AT89C51CC02CA-TDSUM ATMEL [ATMEL Corporation], AT89C51CC02CA-TDSUM Datasheet - Page 37
AT89C51CC02CA-TDSUM
Manufacturer Part Number
AT89C51CC02CA-TDSUM
Description
Enhanced 8-bit Microcontroller with CAN Controller and Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT89C51CC02CA-TDSUM.pdf
(156 pages)
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Status of the Flash Memory
Selecting FM1
Loading the Column Latches
4126J–CAN–05/06
The bit FBUSY in FCON register is used to indicate the status of programming.
FBUSY is set when programming is in progress.
The bit ENBOOT in AUXR1 register is used to map FM1 from F800h to FFFFh.
Any number of data from 1 byte to 128 Bytes can be loaded in the column latches. This
provides the capability to program the whole memory by byte, by page or by any number
of Bytes in a page.
When programming is launched, an automatic erase of the locations loaded in the col-
umn latches is first performed, then programming is effectively done. Thus no page or
block erase is needed and only the loaded data are programmed in the corresponding
page.
The following procedure is used to load the column latches and is summarized in
Figure 14:
•
•
•
•
•
•
Save then disable interrupt and map the column latch space by setting FPS bit.
Load the DPTR with the address to load.
Load Accumulator register with the data to load.
Execute the MOVX @DPTR, A instruction.
If needed loop the three last instructions until the page is completely loaded.
unmap the column latch and Restore Interrupt
AT/T89C51CC02
37
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