HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 573
HD6412320
Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412320.pdf
(1302 pages)
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Bit 1—Group 1 Non-Overlap (G1NOV): Selects normal or non-overlapping operation for pulse
output group 1 (pins PO7 to PO4).
Bit 1
G1NOV
0
1
Bit 0—Group 0 Non-Overlap (G0NOV): Selects normal or non-overlapping operation for pulse
output group 0 (pins PO3 to PO0).
Bit 0
G0NOV
0
1
11.2.7
P1DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 1.
Port 1 is multiplexed with pins PO15 to PO8. Bits corresponding to pins used for PPG output must
be set to 1. For further information about P1DDR, see section 9, I/O Port.
Bit
Initial value :
R/W
Port 1 Data Direction Register (P1DDR)
Description
Normal operation in pulse output group 1 (output values updated at compare match A
in the selected TPU channel)
Non-overlapping operation in pulse output group 1 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
Description
Normal operation in pulse output group 0 (output values updated at compare match A
in the selected TPU channel)
Non-overlapping operation in pulse output group 0 (independent 1 and 0 output at
compare match A or B in the selected TPU channel)
:
:
P17DDR P16DDR P15DDR P14DDR P13DDR P12DDR P11DDR P10DDR
W
7
0
W
6
0
W
5
0
Section 11 Programmable Pulse Generator (PPG)
W
4
0
Rev.6.00 Sep. 27, 2007 Page 543 of 1268
W
3
0
W
2
0
REJ09B0220-0600
W
1
0
(Initial value)
(Initial value)
W
0
0
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