HD6412320 RENESAS [Renesas Technology Corp], HD6412320 Datasheet - Page 790
HD6412320
Manufacturer Part Number
HD6412320
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412320.pdf
(1302 pages)
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Section 19 ROM
Rev.6.00 Sep. 27, 2007 Page 760 of 1268
REJ09B0220-0600
Note: If a memory cell does not operate normally and cannot be erased, one H'FF byte is
continuously at prescribed bit rate
host to indicate end of adjustment
of H'00 data transmitted by host
transmits one H'00 data byte to
Host confirms normal reception
indication (H'00), and transmits
After bit rate adjustment, chip
sets value in bit rate register
Chip calculates bit rate and
Chip measures low period
of bit rate adjustment end
Host transfers data (H'00)
chip transmits one H'AA
and execute reset-start
Set pins to boot mode
transmitted as an erase error, and the erase operation and subsequent operations
are halted.
After receiving H'55,
one H'55 data byte
data byte to host
Start
Figure 19.10 Boot Mode Execution Procedure
Host transmits programming control
program transferred to on-chip RAM
program sequentially in byte units
number of bytes to host as verify
of programming control program
programming control program to
control program to on-chip RAM
if data has already been written,
Transfer received programming
memory data has been erased,
host as verify data (echo-back)
Check flash memory data, and
bytes (N), upper byte followed
Execute programming control
chip transmits one H'AA data
After confirming that all flash
Host transmits number
Chip transmits received
Chip transmits received
End of transmission
data (echo-back)
erase all blocks
by lower byte
byte to host
n = N?
n = 1
Yes
No
n + 1 → n
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