HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 940
HD6412373R
Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
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Section 21 Flash Memory (0.18-μm F-ZTAT Version)
Table 21.3 Register/Parameter and Target Mode
Programming/erasing
interface register
Programming/erasing
interface parameter
Notes: 1. The setting is required when programming or erasing user MAT in user boot mode.
21.3.1
The programming/erasing interface registers are as described below. They are all 8-bit registers
that can be accessed in byte. Except for the FLER bit in FCCS, these registers are initialized at a
power-on reset, in hardware standby mode, or in software standby mode. The FLER bit is not
initialized in software standby mode.
• Flash Code Control and Status Register (FCCS)
Rev.7.00 Mar. 18, 2009 page 872 of 1136
REJ09B0109-0700
FCCS is used to request monitoring of flash memory programming/erase errors or
downloading of on-chip programs.
2. The setting may be required according to the combination of initiation mode and read
Programming/Erasing Interface Register
target MAT.
FEBS
FCCS
FPCS
FECS
FKEY
FMATS
FTDAR
DPFR
FPFR
FPEFEQ
FUBRA
FMPAR
FMPDR
Download
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Initiali-
zation
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Program-
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Erasure
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Read
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