HYB18T512800AF QIMONDA [Qimonda AG], HYB18T512800AF Datasheet
HYB18T512800AF
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HYB18T512800AF Summary of contents
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Cover Page – – ...
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Revision History Revision History: Rev. 1.2, 2006-11-27 All Adapted internet edition Page 19 Updated “Current Spec. and Conditions” on Page 19 Previous Revision: Rev. 1.1, 2006-09-26 All Converted to qimonda template We Listen to Your Comments Any information within this ...
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... Built with 512Mb DDR2 SDRAMs in 60-ball FBGA Chipsize Packages. • Re-drive and re-sync of all address, command, clock and data signals using AMB (Advanced Memory Buffer). • High-Speed Differential Point-to-Point Link Interface at 1.5 V (Jedec standard pending). • Host Interface and AMB component industry standard compliant. • ...
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... Fully Buffered Double-Data-Rate Two Synchronous DRAM Dual In-Line Memory Modules (DDR2 SDRAM FB-DIMMs). Fully Buffered DIMMs use commodity DRAMs isolated from the memory channel behind a buffer on the DIMM. They are intended for use as main memory when installed in systems such as servers and workstations. PC2-4200, PC2-5300 ...
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... GB 2 256M × Product Type DRAM components HYS72T64000HF HYB18T512800AF HYS72T128020HF HYB18T512800AF HYS72T256020HF HYB18T512400AF 1) Green Product 2) For a detailed description of all functionalities of the DRAM components on these modules see the component datasheet. Rev. 1.2, 2006-11 03292006-GUME-ERC3 HYS72T[64/128/256]4[00/20]HFD–[3S/3.7]–A ECC row/bank/columns bits ...
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Pin Configuration The pin configuration of the DDR2 SDRAM DIMM is listed by function in Pin and Buffer Type are explained in Table 6 Pin# Clock Signals 228 229 Control Signals 17 Northbound ...
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Pin 142 145 148 151 154 157 171 174 177 180 183 186 168 160 143 146 149 152 155 158 172 175 178 181 184 187 169 161 Southbound ...
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Pin# 102 100 103 91 190 193 196 199 202 213 216 219 222 210 191 194 197 200 203 214 217 220 223 211 EEPROM 120 119 239 240 118 Rev. ...
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Pin# Power Supplies 238 9,10,12,13,129,130,132,133 15,117,135,237 1,2,3,5,6,7,108,109,111,112,113,115 ,116,121,122,123,125,126, 127,231,232,233,235,236 4,8,11,14,18,21,24,27,30,33,36, 39,42,43,46,47,50,53,56,59,62, 65,68,69,72,75,78,81,84,85,88, 89,92,95,98,101,104,107,110, 114,124,128,131,134,138,141, 144,147,150,153,156,159,162, 163,166,167,170,173,176,179, 182,185,188,189,192,195,198, 201,204,205,208,209,212,215, 218,221,224,227,230,234 Other Pins 19,20,44,45,86,87,105,106,139, 140,164,165,206,207,225,226 136 16 137 Abbreviation HSDL_15 LV-CMOS CMOS OD Rev. 1.2, 2006-11 03292006-GUME-ERC3 HYS72T[64/128/256]4[00/20]HFD–[3S/3.7]–A Name Pin Buffer Type ...
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Abbreviation I O I/O AI PWR GND NU NC Rev. 1.2, 2006-11 03292006-GUME-ERC3 HYS72T[64/128/256]4[00/20]HFD–[3S/3.7]–A Description Standard input-only pin. Digital levels. Output. Digital levels. I bidirectional input/output signal. Input. Analog levels. Power Ground Not Usable Not Connected 10 Internet ...
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Rev. 1.2, 2006-11 03292006-GUME-ERC3 HYS72T[64/128/256]4[00/20]HFD–[3S/3.7]–A Pin Configuration for FB-DIMM (240 pin) 11 Internet Data Sheet FIGURE 1 ...
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... Basic Functionality The Advanced Memory Buffer (AMB) reference design complies with the FB-DIMM Architecture and Protocol Specification. 3.1 Advanced Memory Buffer Functionality The Advanced Memory Buffer will perform the following FB- DIMM channel functions: • Supports channel initialization procedures as defined in the initialization chapter of the FB-DIMM Architecture and ...
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... DIMM until the Rev. 1.2, 2006-11 03292006-GUME-ERC3 HYS72T[64/128/256]4[00/20]HFD–[3S/3.7]–A Block Diagram Advanced Memory Buffer Interface last DIMM receives the data. The last DIMM in the chain initiates the transmission of data in the direction of the host (a.k.a. northbound). On the northbound data path each DIMM receives the data and re-drives the data to the next DIMM until the host is reached ...
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... FB-DIMM link. The Advanced Memory Buffer will never be a master on the SMBus, only a slave. Serial SMBus data transfer is supported at 100 kHz. SMBus access to the Advanced Memory Buffer may be a requirement to boot and 3.3.3 Channel Latency FB-DIMM channel latency is measured from the time a read ...
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Peak Theoretical Channel Throughput An FB-DIMM channel transfers read completion data on the Northbound data connection. 144 bits of data are transferred for every Northbound data frame. This matches the 18-byte data transfer of an ECC DDR DRAM in ...
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Electrical Characteristics 4.1 Operating Conditions Symbol Parameter V V Voltage on pin relative Voltage on pin relative Voltage on pin relative to DDQ DDQ V V Voltage on pin ...
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Parameter Symbol AMB Supply Voltage V CC DRAM Supply Voltage V DD Termination Voltage V TT EEPROM Supply Voltage V DDSPD DC Input Logic High(SPD) V IH(DC) DC Input Logic Low(SPD) V IL(DC) DC Input Logic High(RESET) V IH(DC) DC ...
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Parameter Operating Temperature Operating Humidity (relative) Storage Temperature Storage Humidity (without condensation) Barometric pressure (operating) Barometric pressure (storage) 1) The designer must meet the case temperature specifications for individual module components. 2) Stresses greater than those listed may cause permanent ...
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Current Spec. and Conditions The following table provides an overview of the measurement conditions. Parameter Idle Current, single or last DIMM L0 state, idle (0 BW) Primary channel enabled, Secondary channel disabled CKE high. Command and address lines stable. ...
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Parameter MemBIST Over all MemBIST modes >50% DRAM BW (as dictated by the AMB) Primary channel Enabled Secondary channel Enabled CKE high. Command and Address lines stable DRAM clock active Electrical Idle DRAM Idle (0 BW) Primary channel Disabled Secondary ...
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I /I Conditions the following table you can find the Measurement Conditions and Power Supply Currents Product Type Speed Grade PC2-5300F Symbol Max. ICC_Idle_0 2.09 PCC_Idle_0 3.09 IDD_Idle_0 0.73 PDD_Idle_0 1.3 ITOT_Idle_0 2.81 PTOT_Idle_0 4.38 ICC_Idle_1 ...
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Product Type Speed Grade PC2-5300F Symbol Max. ITOT_Active_2 3.75 PTOT_Active_ 5.76 2 ICC_IBIST 3.43 PCC_IBIST 5.01 IDD_IBIST 0.69 PDD_IBIST 1.23 ITOT_IBIST 4.11 PTOT_IBIST 6.23 ICC_Training 2.99 PCC_Training 4.37 IDD_Trainig 0.69 PDD_Training 1.23 ITOT_Trainig 3.67 PTOT_Training 5.59 ICC_EI 2.13 PCC_EI 3.13 ...
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Product Type Speed Grade PC2-4200F Symbol Max. ICC_Idle_0 1.78 PCC_Idle_0 2.63 IDD_Idle_0 0.69 PDD_Idle_0 1.24 ITOT_Idle_0 2.46 PTOT_Idle_0 3.86 ICC_Idle_1 2.51 PCC_Idle_1 3.69 IDD_Idle_1 0.69 PDD_Idle_1 1.23 ITOT_Idle_1 3.19 PTOT_Idle_1 4.91 ICC_Active_1 2.65 PCC_Active_1 3.89 IDD_Active_1 2.09 PDD_Active_1 3.71 ITOT_Active_1 ...
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Product Type Speed Grade PC2-4200F Symbol Max. PDD_IBIST 1.16 ITOT_IBIST 3.57 PTOT_IBIST 5.44 ICC_Training 2.56 PCC_Training 3.76 IDD_Trainig 0.65 PDD_Training 1.16 ITOT_Trainig 3.21 PTOT_Training 4.92 ICC_EI 1.71 PCC_EI 2.53 IDD_EI 0.14 PDD_EI 0.24 ITOT_EI 1.85 PTOT_EI 2.77 ICC_MEMBIST 2.54 PCC_MEMBIS ...
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SPD Codes This chapter lists all hexadecimal byte values stored in the EEPROM of the products described in this data sheet. SPD stands for serial presence detect. All values with XX in the table are module specific bytes which ...
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Product Type Organization Label Code JEDEC SPD Revision Byte# Description t 14 (min. CAS Latency Time) CAS.MIN 15 Write Recovery Values Supported (WR (Write Recovery Time) WR.MIN 17 Write Latency Times Supported 18 Additive Latency Times Supported t ...
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Product Type Organization Label Code JEDEC SPD Revision Byte# Description ∆ (DT5B) DRAM 5B ∆ (DT7) DRAM Not used 79 FBDIMM ODT Values 80 Not used 81 Channel Protocols Supported LSB 82 ...
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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 105 AMB Personality Bytes: Pre-initialization (5) 106 AMB Personality Bytes: Pre-initialization (6) 107 AMB Personality Bytes: Post-initialization (1) 108 AMB Personality Bytes: Post-initialization (2) 109 AMB Personality Bytes: Post-initialization (3) ...
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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 133 Module Product Type, Char #6 134 Module Product Type, Char #7 135 Module Product Type, Char #8 136 Module Product Type, Char #9 137 Module Product Type, Char #10 ...
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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 0 SPD Size CRC / Total / Used 1 SPD Revision 2 Key Byte / DRAM Device Type 3 Voltage Level of this Assembly 4 SDRAM Addressing 5 Module Physical ...
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Product Type Organization Label Code JEDEC SPD Revision Byte# Description t 23 (min. Active to Precharge Time) RAS.MIN t 24 (min. Active to Active / Refresh Time) RC.MIN t 25 LSB (min. Refresh Recovery Time Delay) RFC.MIN t 26 MSB ...
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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 85 AMB Read Access Delay for DDR2-667 86 AMB Read Access Delay for DDR2-533 87 Psi(T-A) AMB ∆ (DT Idle_0) AMB Idle_0 ∆ (DT Idle_1) AMB ...
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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 114 AMB Personality Bytes: Post-initialization (8) 115 AMB Manufacturers JEDEC ID Code LSB 116 AMB Manufacturers JEDEC ID Code MSB 117 DIMM Manufacturers JEDEC ID Code LSB 118 DIMM Manufacturers ...
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Product Type Organization Label Code JEDEC SPD Revision Byte# Description 142 Module Product Type, Char #15 143 Module Product Type, Char #16 144 Module Product Type, Char #17 145 Module Product Type, Char #18 146 Module Revision Code 147 Test ...
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Package Outline All Components are surface mounted on one or both sides of the PCB and positioned on the PCB to meet the minimum and maximum trace lengths required for DDR2 SDRAM signals. Bypass capacitors for DDR2 SDRAM devices ...
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Notes 1. Please contact your sales or marketing representative for more details on package dimensions. Rev. 1.2, 2006-11 03292006-GUME-ERC3 HYS72T[64/128/256]4[00/20]HFD–[3S/3.7]–A Package Outline L-DIM-240-21 with Full Heat Sink 2. Drawing according to ISO 8015 3. Dimensions General tolerances ...
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Notes 1. Please contact your sales or marketing representative for more details on package dimensions. Rev. 1.2, 2006-11 03292006-GUME-ERC3 HYS72T[64/128/256]4[00/20]HFD–[3S/3.7]–A Package Outline L-DIM-240-22 with Full Heat Sink 2. Drawing according to ISO 8015 3. Dimensions General tolerances ...
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Notes 1. Please contact your sales or marketing representative for more details on package dimensions. Rev. 1.2, 2006-11 03292006-GUME-ERC3 HYS72T[64/128/256]4[00/20]HFD–[3S/3.7]–A Package Outline L-DIM-240-25 with Full Heat Sink 2. Drawing according to ISO 8015 3. Dimensions General tolerances ...
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... Field Number 1 2 Micro-DIMM HYS 64 DDR2 DRAM HYB 18 Field Description 1 Module Prefix 2 Module Data Width [bit] 3 DRAM Technology 4 Memory Density per I/O [Mbit]; 1) Module Density 5 Raw Card Generation 6 Number of Module Ranks 7 Product Variations 8 Package, Lead-Free Status 9 Module Type 10 Speed Grade Rev. 1.2, 2006-11 03292006-GUME-ERC3 HYS72T[64/128/256]4[00/20]HFD– ...
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... Field Description 11 Die Revision 1) Multiplying “Memory Density per I/O” with “Module Data Width” and dividing by 8 for Non-ECC and 9 for ECC modules gives the overall module memory density in MBytes as listed in column “Coding”. Field Description 1 Component Prefix 2 Interface Voltage [V] 3 DRAM Technology ...
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... Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Basic Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 Advanced Memory Buffer Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.3 High-Speed Differential Point-to-Point Link (at 1.5 V) Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3.1 DDR2 Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3.2 SMBus Slave Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3.3 Channel Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3.4 Peak Theoretical Channel Throughput . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.4 Hot-add . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.5 Hot-remove . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.6 Hot-replace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 Current Spec ...
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Edition 2006-11 Published by Qimonda AG Gustav-Heinemann-Ring 212 D-81739 München, Germany © Qimonda AG 2006. All Rights Reserved. Legal Disclaimer The information given in this Internet Data Sheet shall in no event be regarded as a guarantee of conditions or ...