HYB18T512800AF QIMONDA [Qimonda AG], HYB18T512800AF Datasheet - Page 25

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HYB18T512800AF

Manufacturer Part Number
HYB18T512800AF
Description
240-Pin Fully-Buffered DDR2 SDRAM Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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6
This chapter lists all hexadecimal byte values stored in the EEPROM of the products described in this data sheet. SPD stands
for serial presence detect. All values with XX in the table are module specific bytes which are defined during production.
List of SPD Code Tables
Rev. 1.2, 2006-11
03292006-GUME-ERC3
Product Type
Organization
Label Code
JEDEC SPD Revision
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
Table 16 “PC2–5300F–555” on Page 25
Table 17 “PC2–4200F–444” on Page 30
Description
SPD Size CRC / Total / Used
SPD Revision
Key Byte / DRAM Device Type
Voltage Level of this Assembly
SDRAM Addressing
Module Physical Attributes
Module Type
Module Organization
Fine Timebase (FTB) Dividend and Divisor
Medium Timebase (MTB) Dividend
Medium Timebase (MTB) Divisor
t
t
CAS Latencies Supported
CK.MIN
CK.MAX
(min. SDRAM Cycle Time)
(max. SDRAM Cycle Time)
SPD Codes
25
512MB
×72
1 Rank (×8)
PC2–5300F–555
Rev. 1.1
HEX
92
11
12
44
23
07
09
00
01
04
0C
20
33
09
HYS72T[64/128/256]4[00/20]HFD–[3S/3.7]–A
1 GByte
×72
2 Ranks (×8)
PC2–5300F–555
Rev. 1.1
HEX
92
11
09
12
44
23
07
11
00
01
04
0C
20
33
Internet Data Sheet
2 GByte
×72
2 Ranks (×4)
PC2–5300F–555
Rev. 1.1
HEX
92
11
09
12
48
23
07
10
00
01
04
0C
20
33
PC2–5300F–555
TABLE 16

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