STC4130-I ETC2 [List of Unclassifed Manufacturers], STC4130-I Datasheet - Page 35

• Manufacturer Part Number: STC4130-I
• Description: Synchronous Clock for SETS
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Default value: 0.
T4_Long_Term_Accu_History, 0x41 (R)
Long term accumulated history for T4 relative to the TCXO. Resolution is 0.745x10
T4_Short_Term_Accu_History, 0x45 (R)
Short term accumulated history for T4 relative to the TCXO. Resolution is 0.745x10
T4_User_Accu_History, 0x49 (R/W)
User accumulated history for T4 relative to the TCXO. Resolution is 0.745x10
Default value: 0.
T4_HO_Ramp, 0x4d (R/W)
Holdover bandwidth and ramp controls for T4:
Address
Address
Address
Address
0x4d
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4a
0x4b
0x4c
Not used
Bit7
Bit7
Bit7
Bit7
Long term History bandwidth
© Copyright 2006 The Connor-Winfield Corp.
Bit6
Bit6
Bit6
Bit6
Bit 3 ~ Bit 0
1101 ~ 1111
Data Sheet #: TM084
0x30, bits 6 ~ 4
Bit5
Bit5
Bit5
Bit5
Bits 16 - 23 of 32 bit Short Term Holdover History
Bits 24 - 31 of 32 bit Short Term Holdover History
Bits 16 - 23 of 32 bit Long Term Holdover History
Bits 24 - 31 of 32 bit Long Term Holdover History
Bits 16 - 23 of 32 bit User Term Holdover History
Bits 24 - 31 of 32 bit User Term Holdover History
Bits 8 - 15 of 32 bit Short Term Holdover History
Bits 8 - 15 of 32 bit Long Term Holdover History
Bits 8 - 15 of 32 bit User Term Holdover History
Bits 0 - 7 of 32 bit Short Term Holdover History
Bits 0 - 7 of 32 bit Long Term Holdover History
000
001
010
Bits 0 - 7 of 32 bit User Holdover History
Holdover
Phase Align Mode/Ref selection
Bit4
Bit4
Bit4
Bit4
Bandwidth, mHz
Long term
All Rights Reserved
9.7 mHz
4.9 mHz
2.4 mHz
History
Short term History band-
Page 35 of 44
Bit3
Bit3
Bit3
Bit3
Synchronous Clock for SETS
width
Specifications subject to change without notice
-3
Bit2
Bit2
Bit2
Bit2
ppb.
-3
Rev: P02
-3
ppb.
ppb.
STC4130
Data Sheet
Bit1
Bit1
Bit1
Bit1
Ramp control
Date: 12/5/06
Bit0
Bit0
Bit0
Bit0