ADP1053 AD [Analog Devices], ADP1053 Datasheet - Page 31

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ADP1053

Manufacturer Part Number
ADP1053
Description
3-Channel Digital
Manufacturer
AD [Analog Devices]
Datasheet
Data Sheet
FIRST FLAG ID RECORDING
When the
stores the first flag in a dedicated register (Register 0xFECA for
Channel A and Register 0xFECB for Channel B). The first flag ID
represents the first flag that triggers a response and requires a
soft start after the fault is resolved. The following types of flags
are not recorded in the first flag ID register:
For more information, see the Protection Actions section.
The first flag ID registers give the user more information for
fault diagnosis than a simple flag. These registers also store the
previous first flag ID. The status of the first flag ID registers can
be downloaded to the EEPROM (set Bit 5 of Register 0xFE08).
The contents of the first flag ID registers are stored until read
by the user. The flag ID is also saved in EEPROM. In this way,
the user can read the flag information even if the
powered off.
The Channel A first flag ID register (Register 0xFECA)
records the first flag ID of the fault that shut down Channel A;
the Channel B first flag ID register (Register 0xFECB) records
the first flag ID of the fault that shut down Channel B.
Table 10. First Flag ID Timing
Step
t
t
t
t
t
t
t
t
t
t
0
1
2
3
4
5
6
7
8
9
Flags that are configured to be ignored
Flags whose configured action causes PWM outputs to be
disabled but which do not use a soft start to reenable the
PWM outputs after the fault is resolved
Action
The PSON signal turns on the power supply. The
the EEPROM and saves it to the first flag ID register as both the current ID and the
previous ID.
A fault (Flag Y) shuts down the power supply. Flag Y is now the current flag ID, and
Flag X is the previous flag ID. The first flag ID register is updated accordingly; the
EEPROM is then updated to save this information.
Another fault (Flag Z) occurs while the power supply is off. Because Flag Z is not
the first flag that caused the shutdown, neither the first flag ID register nor the
EEPROM is updated.
Flag Y is cleared, but Flag Z keeps the power supply off. The first flag ID register is
not updated.
Flag Z is cleared. The first flag ID register is not updated.
The power supply is turned on again after the reenable delay. The first flag ID
register is not updated.
The fault indicated by Flag Z shuts down the power supply. Flag Z is now the current
flag ID, and Flag Y is the previous flag ID. The first flag ID register is updated accordingly;
the EEPROM is then updated to save this information.
Flag Z is cleared. The first flag ID register is not updated.
The power supply is turned on again after the reenable delay. The first flag ID
register is not updated.
PSON turns off the power supply.
ADP1053
registers one or more fault conditions, it
ADP1053
ADP1053
is
Rev. A | Page 31 of 84
reads the first flag ID from
Figure 29 shows the timing of the first flag ID recording
scheme. Table 10 describes the actions shown in Figure 29.
The first flag ID recording function can be disabled by setting
Bit 5 to 0 in Register 0xFE08.
POWER SUPPLY
FIRST FLAG ID
FIRST FLAG ID
(PREVIOUS)
(CURRENT)
EEPROM
UPDATE
STATUS
FLAG Y
FLAG Z
PSON
t
0
Figure 29. First Flag ID Timing
Power Supply
On
Off
Off
Off
Off
On
Off
Off
On
Off
X
0
t
1
t
2
t
3
t
4
t
5
Y
X
Previous
Flag ID
Flag X
Flag X
Flag X
Flag X
Flag X
Flag X
Flag Y
Flag Y
Flag Y
t
6
First Flag ID Register
t
7
t
8
ADP1053
Y
Z
t
Current
Flag ID
Flag X
Flag Y
Flag Y
Flag Y
Flag Y
Flag Y
Flag Z
Flag Z
Flag Z
9

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