ADP1053 AD [Analog Devices], ADP1053 Datasheet - Page 45

• Manufacturer Part Number: ADP1053
• Description: 3-Channel Digital
• Manufacturer: AD [Analog Devices]

Data Sheet
Command
0xFE58
0xFE59
0xFE5A
0xFE5B
0xFE5C
0xFE5D
0xFE5E
0xFE5F
0xFE60
GO Command Register
0xFE61
Balance Control Registers
0xFE62
0xFE63
0xFE64
Synchronization Setting Registers
0xFE65
0xFE66
SR and Channel C Soft Start Setting Registers
0xFE67
0xFE68
Light Load PWM Disable Registers
0xFE69
0xFE6A
Fast OCP and Channel C Current Sense Setting Registers
0xFE6B
0xFE6C
0xFE6D
0xFE6E
0xFE6F
0xFE70
0xFE71
0xFE72
Temperature Sense and Protection Setting Registers
0xFE75
0xFE76
ACSNS and Feedforward Setting Registers
0xFE77
0xFE78
PSON Registers
0xFE79
0xFE7A
0xFE7B
Name
OUT7 rising edge timing (MSBs)
OUT7 falling edge timing (MSBs)
OUT7 rising and falling edge timing (LSBs)
OUT7 settings
OUT8 rising edge timing (MSBs)
OUT8 falling edge timing (MSBs)
OUT8 rising and falling edge timing (LSBs)
OUT8 settings
PWM output pin disable
GO commands
Balance control on OUT1 and OUT2
Balance control on OUT3 and OUT4
Balance control on OUT5, OUT6, OUT7, and OUT8
OUT1 and OUT2 shutdown in Channel C
synchronization
OUT1 through OUT8 dead time adjustment in
synchronization
Synchronous rectifier (SR) soft start
Channel C soft start
Channel A light load mode PWM output disable
Channel B light load mode PWM output disable
CS1_A blanking reference edge
CS1_B blanking reference edge
OUT3, OUT4, OUT7, and OUT8 cycle-by-cycle OCP
response
CS gain trim
CS OCP settings
CS1_A OCP settings
CS1_B OCP settings
Balance control settings
OTP1 threshold
OTP2 threshold
ACSNS gain trim
ACSNS setting
Channel A PSON setting
Channel B PSON setting
Additional flag reenable delay and Channel C
PSON setting
Rev. A | Page 45 of 84
Command
RTD Trim Registers
0xFE73
0xFE74
0xFE7C
0xFE7D
0xFE7E
0xFE7F
0xFE80
0xFE81
Customized Registers
0xFE82
0xFE83
0xFE84
0xFE85
0xFE86
0xFE87
0xFE88
0xFE89
0xFE8A
Flag Registers
0xFEC0
0xFEC1
0xFEC2
0xFEC3
0xFEC4
0xFEC5
0xFEC6
0xFEC7
0xFEC8
0xFEC9
0xFECA
0xFECB
Value Registers
0xFED0
0xFED1
0xFED2
0xFED3
0xFED4
0xFED5
0xFED6
0xFED7
0xFED8
0xFED9
0xFEDA
0xFEDB
Name
RTD1 gain trim
RTD2 gain trim
RTD1 offset trim (MSB)
RTD1 offset trim (LSBs)
RTD2 offset trim (MSB)
RTD2 offset trim (LSBs)
RTD1 current source settings
RTD2 current source settings
Custom register
REVERSE_A/REVERSE_B flag configuration
REVERSE_A flag settings
REVERSE_B flag settings
VS_A slew rate for output voltage adjustment
VS_B slew rate for output voltage adjustment
Power supply software reset control
CS, CS1, and CS2 ADC update rate
OTW1/OTW2 settings
Flag Register 1
Flag Register 2
Flag Register 3
Flag Register 4
Flag Register 5
Latched Flag Register 1
Latched Flag Register 2
Latched Flag Register 3
Latched Flag Register 4
Latched Flag Register 5
Channel A first flag ID
Channel B first flag ID
CS value
CS1_A value
CS1_B value
CS2_A value
CS2_B value
VS_A value
VS_B value
RTD1 value
RTD2 value
ACSNS value
Channel A duty cycle value
Channel B duty cycle value
ADP1053