ADP1053 AD [Analog Devices], ADP1053 Datasheet - Page 58

• Manufacturer Part Number: ADP1053
• Description: 3-Channel Digital
• Manufacturer: AD [Analog Devices]

ADP1053
Table 52. Register 0xFE1E—VS_A Reference Maximum Limit
Bits
[7:6]
[5:0]
Table 53. Register 0xFE1F—VS_B Reference Maximum Limit
Bits
[7:6]
[5:0]
Table 54. Register 0xFE20—VS_A Reference Minimum Limit
Bits
[7:6]
[5:0]
Table 55. Register 0xFE21—VS_B Reference Minimum Limit
Bits
[7:6]
[5:0]
Table 56. Register 0xFE22—VS_A Reference Setting (MSBs)
Bits
[7:0]
Table 57. Register 0xFE23—VS_B Reference Setting (MSBs)
Bits
[7:0]
Table 58. Register 0xFE24—VS_A Reference Setting (LSBs)
Bits
[7:4]
[3:0]
Table 59. Register 0xFE25—VS_B Reference Setting (LSBs)
Bits
[7:4]
[3:0]
Bit Name
Reserved
VS_A maximum
reference
Bit Name
Reserved
VS_B maximum
reference
Bit Name
Reserved
VS_A minimum
reference
Bit Name
Reserved
VS_B minimum
reference
Bit Name
VS_A voltage
reference MSBs
Bit Name
VS_B voltage
reference MSBs
Bit Name
Reserved
VS_A voltage
reference LSBs
Bit Name
Reserved
VS_B voltage
reference LSBs
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved.
This register sets the maximum limit of the Channel A output voltage reference. It sets the six
MSBs for the reference limit. The factory default setting is 0x3F.
Description
Reserved.
This register sets the maximum limit of the Channel B output voltage reference. It sets the six
MSBs for the reference limit. The factory default setting is 0x3F.
Description
Reserved.
This register sets the minimum limit of the Channel A output voltage reference. It sets the six
MSBs for the reference limit. The factory default setting is 0x00.
Description
Reserved.
This register sets the minimum limit of the Channel B output voltage reference. It sets the six
MSBs for the reference limit. The factory default setting is 0x00.
Description
This register sets the eight MSBs of the output voltage reference for Channel A. Together with
Bits[3:0] of Register 0xFE24, this register sets the 12-bit reference. In a steady state, closed-loop
operation, the output of the VS_A ADC is regulated to the reference setting value.
Description
This register sets the eight MSBs of the output voltage reference for Channel B. Together with
Bits[3:0] of Register 0xFE25, this register sets the 12-bit reference. In a steady state, closed-loop
operation, the output of the VS_B ADC is regulated to the reference setting value.
Description
Reserved.
This register sets the four LSBs of the output voltage reference for Channel A. Together with
Register 0xFE22, this register sets the 12-bit reference. In a steady state, closed-loop operation,
the output of the VS_A ADC is regulated to the reference setting value.
Description
Reserved.
This register sets the four LSBs of the output voltage reference for Channel B. Together with
Register 0xFE23, this register sets the 12-bit reference. In a steady state, closed-loop operation,
the output of the VS_B ADC is regulated to the reference setting value.
Rev. A | Page 58 of 84
Data Sheet