LPC2141_08 NXP [NXP Semiconductors], LPC2141_08 Datasheet
LPC2141_08
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LPC2141_08 Summary of contents
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LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers 512 kB flash with ISP/IAP, USB 2.0 full-speed device, 10-bit ADC and DAC Rev. 04 — 17 November 2008 1. General description The LPC2141/42/44/46/48 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time ...
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NXP Semiconductors I Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input. I Multiple serial interfaces including two UARTs (16C550), two Fast I SPI and SSP with buffering and variable data length capabilities. I Vectored Interrupt ...
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NXP Semiconductors 4. Block diagram LPC2141/42/44/46/48 P0[31:28] and FAST GENERAL P0[25:0] PURPOSE I/O P1[31:16] ARM7 local bus INTERNAL SRAM CONTROLLER 8 kB/16 kB SRAM EXTERNAL EINT3 to EINT0 INTERRUPTS 4 CAP0 CAPTURE/COMPARE 4 CAP1 (W/EXTERNAL CLOCK) 8 MAT0 ...
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NXP Semiconductors 5. Pinning information 5.1 Pinning P0.21/PWM5/CAP1.3 1 P0.22/CAP0.0/MAT0 RTCX1 4 P1.19/TRACEPKT3 RTCX2 DDA P1.18/TRACEPKT2 8 P0.25/AD0 P1.17/TRACEPKT1 12 P0.28/AD0.1/CAP0.2/MAT0 P0.29/AD0.2/CAP0.3/MAT0.3 P0.30/AD0.3/EINT3/CAP0.0 15 P1.16/TRACEPKT0 ...
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NXP Semiconductors P0.21/PWM5/CAP1.3 1 P0.22/CAP0.0/MAT0 RTCX1 P1.19/TRACEPKT3 4 RTCX2 DDA P1.18/TRACEPKT2 8 P0.25/AD0.4/AOUT P1.17/TRACEPKT1 12 P0.28/AD0.1/CAP0.2/MAT0 P0.29/AD0.2/CAP0.3/MAT0.3 P0.30/AD0.3/EINT3/CAP0.0 15 P1.16/TRACEPKT0 16 Fig 3. LPC2142 pinning ...
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NXP Semiconductors P0.21/PWM5/AD1.6/CAP1 P0.22/AD1.7/CAP0.0/MAT0.0 RTCX1 3 P1.19/TRACEPKT3 4 RTCX2 DDA P1.18/TRACEPKT2 8 9 P0.25/AD0.4/AOUT P1.17/TRACEPKT1 12 13 P0.28/AD0.1/CAP0.2/MAT0.2 P0.29/AD0.2/CAP0.3/MAT0.3 14 P0.30/AD0.3/EINT3/CAP0 P1.16/TRACEPKT0 Fig 4. LPC2144/46/48 pinning ...
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NXP Semiconductors 5.2 Pin description Table 3. Pin description Symbol Pin P0.0 to P0.31 [1] P0.0/TXD0/ 19 PWM1 [2] P0.1/RXD0/ 21 PWM3/EINT0 [3] P0.2/SCL0/ 22 CAP0.0 [3] P0.3/SDA0/ 26 MAT0.0/EINT1 [4] P0.4/SCK0/ 27 CAP0.1/AD0.6 [4] P0.5/MISO0/ 29 MAT0.1/AD0.7 [4] P0.6/MOSI0/ ...
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NXP Semiconductors Table 3. Pin description …continued Symbol Pin [2] P0.9/RXD1/ 34 PWM6/EINT3 [4] P0.10/RTS1/ 35 CAP1.0/AD1.2 [3] P0.11/CTS1/ 37 CAP1.1/SCL1 [4] P0.12/DSR1/ 38 MAT1.0/AD1.3 [4] P0.13/DTR1/ 39 MAT1.1/AD1.4 [3] P0.14/DCD1/ 41 EINT1/SDA1 [4] P0.15/RI1/ 45 EINT2/AD1.5 [2] P0.16/EINT0/ 46 ...
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NXP Semiconductors Table 3. Pin description …continued Symbol Pin [1] P0.18/CAP1.3/ 53 MISO1/MAT1.3 [1] P0.19/MAT1.2/ 54 MOSI1/CAP1.2 [2] P0.20/MAT1.3/ 55 SSEL1/EINT3 [4] P0.21/PWM5/ 1 AD1.6/CAP1.3 [4] P0.22/AD1.7/ 2 CAP0.0/MAT0.0 [1] P0.23/V 58 BUS [5] P0.25/AD0.4/ 9 AOUT [4] P0.28/AD0.1/ 13 ...
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NXP Semiconductors Table 3. Pin description …continued Symbol Pin [6] P0.31/UP_LED/ 17 CONNECT P1.0 to P1.31 [6] P1.16/ 16 TRACEPKT0 [6] P1.17/ 12 TRACEPKT1 [6] P1.18/ 8 TRACEPKT2 [6] P1.19/ 4 TRACEPKT3 [6] P1.20/ 48 TRACESYNC [6] P1.21/ 44 PIPESTAT0 ...
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NXP Semiconductors Table 3. Pin description …continued Symbol Pin [6] P1.26/RTCK 24 [6] P1.27/TDO 64 [6] P1.28/TDI 60 [6] P1.29/TCK 56 [6] P1.30/TMS 52 [6] P1.31/TRST [8] RESET 57 [9] XTAL1 62 [9] ...
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NXP Semiconductors [ tolerant pad (no built-in pull-up resistor) providing digital I/O (with TTL levels and hysteresis and 10 ns slew rate control) and analog input function. If configured for an input function, this pad utilizes built-in glitch ...
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NXP Semiconductors 6. Functional description 6.1 Architectural overview The ARM7TDMI general purpose 32-bit microprocessor, which offers high performance and very low power consumption. The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction ...
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NXP Semiconductors 6.3 On-chip static RAM On-chip static RAM may be used for code and/or data storage. The SRAM may be accessed as 8-bit, 16-bit, and 32-bit. The LPC2141, LPC2142/44 and LPC2146/48 provide 8 kB and 32 kB ...
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NXP Semiconductors 6.5 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes them as Fast Interrupt Request (FIQ), vectored Interrupt Request (IRQ), and non-vectored IRQ as defined by programmable settings. The programmable assignment ...
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NXP Semiconductors 6.7 Fast general purpose parallel I/O (GPIO) Device pins that are not connected to a specific peripheral function are controlled by the GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate registers allow setting or ...
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NXP Semiconductors • Selectable speed versus power. 6.10 USB 2.0 device controller The USB is a 4-wire serial bus that supports communication between a host and a number (127 max) of peripherals. The host controller allocates the USB bandwidth to ...
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NXP Semiconductors 6.11.1 Features • Receive and Transmit FIFOs. • Register locations conform to 16C550 industry standard. • Receiver FIFO trigger points and 14 B • Built-in fractional baud rate generator ...
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NXP Semiconductors 6.13.1 Features • Compliant with SPI specification. • Synchronous, Serial, Full Duplex, Communication. • Combined SPI master and slave. • Maximum data bit rate of one eighth of the input clock rate. 6.14 SSP serial I/O controller The ...
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NXP Semiconductors – Stop timer on match with optional interrupt generation. – Reset timer on match with optional interrupt generation. • Four external outputs per timer/counter corresponding to match registers, with the following capabilities: – Set LOW on match. – ...
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NXP Semiconductors 6.18 Pulse width modulator The PWM is based on the standard timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2141/42/44/46/48. The timer is designed to count cycles of ...
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NXP Semiconductors • Match register updates are synchronized with pulse outputs to prevent generation of erroneous pulses. Software must ‘release’ new match values before they can become effective. • May be used as a standard timer if the PWM mode ...
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NXP Semiconductors The Wake-up Timer monitors the crystal oscillator as the means of checking whether it is safe to begin code execution. When power is applied to the chip, or some event caused the chip to exit Power-down mode, some ...
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NXP Semiconductors 6.19.8 Power control The LPC2141/42/44/46/48 supports two reduced power modes: Idle mode and Power-down mode. In Idle mode, execution of instructions is suspended until either a reset or interrupt occurs. Peripheral functions continue operation during Idle mode and ...
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NXP Semiconductors The ARM core has a Debug Communication Channel (DCC) function built-in. The DCC allows a program running on the target to communicate with the host debugger or another separate host without stopping the program flow or even entering ...
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NXP Semiconductors 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (core and external rail analog 3.3 V pad supply voltage DDA V input voltage ...
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NXP Semiconductors 8. Static characteristics Table 5. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage DD V analog supply voltage DDA V input voltage on pin i(VBAT) ...
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NXP Semiconductors Table 5. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter I active mode supply DD(act) current I Power-down mode DD(pd) supply current I Power-down mode BATpd battery supply ...
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NXP Semiconductors Table 5. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V output voltage on pin o(XTAL2) XTAL2 V input voltage on pin i(RTCX1) RTCX1 V output voltage on ...
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NXP Semiconductors Table 6. ADC static characteristics +85 C unless otherwise specified; ADC frequency 4.5 MHz. DDA amb Symbol Parameter V analog input voltage IA C analog input ...
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NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity ...
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NXP Semiconductors ADx.y Fig 7. Suggested ADC interface - LPC2141/42/44/46/48 ADx.y pin LPC2141_42_44_46_48_4 Product data sheet LPC2141/42/44/46/ SAMPLE Rev. 04 — 17 November 2008 LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers R vsi ADx.y V ...
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NXP Semiconductors 9. Dynamic characteristics Table 7. Dynamic characteristics of USB pins (full-speed pF 1 Symbol Parameter t rise time r t fall time f t differential rise ...
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NXP Semiconductors 9.1 Timing Fig 8. External clock timing (with an amplitude of at least V t PERIOD differential data lines Fig 9. Differential data-to-EOP transition skew and EOP width 10. Application information 10.1 Suggested USB interface solutions LPC2141/42/ 44/46/48 ...
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NXP Semiconductors LPC2141/42/ 44/46/48 Fig 11. LPC2141/42/44/46/48 USB interface using the UP_LED function on pin 17 LPC2141_42_44_46_48_4 Product data sheet LPC2141/42/44/46/48 Single-chip 16-bit/32-bit microcontrollers 1.5 k UP_LED VBUS ...
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NXP Semiconductors 11. Package outline LQFP64: plastic low profile quad flat package; 64 leads; body 1 pin 1 index DIMENSIONS (mm are the original ...
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NXP Semiconductors 12. Abbreviations Table 9. Acronym ADC APB BOD CPU DAC DCC DMA EOP FIFO GPIO PLL POR PWM RAM SE0 SPI SRAM SSP UART USB LPC2141_42_44_46_48_4 Product data sheet Acronym list Description Analog-to-Digital Converter Advanced Peripheral Bus Brown-Out ...
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NXP Semiconductors 13. Revision history Table 10. Revision history Document ID Release date LPC2141_42_44_46_48_4 20081117 Modifications: LPC2141_42_44_46_48_3 20071019 LPC2141_42_44_46_48_2 20060828 LPC2141_42_44_46_48_1 20051003 LPC2141_42_44_46_48_4 Product data sheet Data sheet status Product data sheet • Replaced all occurrences of VPB with APB. ...
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NXP Semiconductors 14. Legal information 14.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...
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NXP Semiconductors 16. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...