LM3S1911-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S1911-IQC20-A0 Datasheet - Page 128
LM3S1911-IQC20-A0
Manufacturer Part Number
LM3S1911-IQC20-A0
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S1911-IQC20-A0.pdf
(426 pages)
- Current page: 128 of 426
- Download datasheet (5Mb)
Hibernation Module
Hibernation Data (HIBDATA)
Base 0x400F.C000
Offset 0x030-0x12C
Type R/W, reset 0x0000.0000
128
Reset
Reset
Type
Type
Bit/Field
31:0
R/W
R/W
31
15
0
0
Register 11: Hibernation Data (HIBDATA), offset 0x030-0x12C
This address space is implemented as a 64x32-bit memory (256 bytes). It can be loaded by the
system processor in order to store any non-volatile state data and will not lose power during a power
cut operation.
R/W
R/W
30
14
0
0
Name
RTD
R/W
R/W
29
13
0
0
R/W
R/W
28
12
0
0
R/W
R/W
Type
27
11
R/W
0
0
R/W
R/W
26
10
0x0000.0000
0
0
Reset
R/W
R/W
25
0
9
0
Preliminary
Description
Hibernation Module NV Registers[63:0]
R/W
R/W
24
0
8
0
RTD
RTD
R/W
R/W
23
0
7
0
R/W
R/W
22
0
6
0
R/W
R/W
21
0
5
0
R/W
R/W
20
0
4
0
R/W
R/W
19
0
3
0
R/W
R/W
18
0
2
0
October 09, 2007
R/W
R/W
17
0
1
0
R/W
R/W
16
0
0
0
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