LM3S1911-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S1911-IQC20-A0 Datasheet - Page 203
LM3S1911-IQC20-A0
Manufacturer Part Number
LM3S1911-IQC20-A0
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S1911-IQC20-A0.pdf
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10.3.6
10.4
Table 10-2. Timers Register Map
October 09, 2007
Offset
0x000
0x004
Name
GPTMCFG
GPTMTAMR
In Input Edge Timing mode, the timer continues running after an edge event has been detected,
but the timer interval can be changed at any time by writing the GPTMTnILR register. The change
takes effect at the next cycle after the write.
16-Bit PWM Mode
A timer is configured to PWM mode using the following sequence:
1.
2.
3.
4.
5.
6.
7.
8.
In PWM Timing mode, the timer continues running after the PWM signal has been generated. The
PWM period can be adjusted at any time by writing the GPTMTnILR register, and the change takes
effect at the next cycle after the write.
Register Map
Table 10-2 on page 203 lists the GPTM registers. The offset listed is a hexadecimal increment to the
register’s address, relative to that timer’s base address:
■
■
■
■
Timer0: 0x4003.0000
Timer1: 0x4003.1000
Timer2: 0x4003.2000
Timer3: 0x4003.3000
Interrupt Clear (GPTMICR) register. The time at which the event happened can be obtained
by reading the GPTM Timern (GPTMTnR) register.
Ensure the timer is disabled (the TnEN bit is cleared) before making any changes.
Write the GPTM Configuration (GPTMCFG) register with a value of 0x4.
In the GPTM Timer Mode (GPTMTnMR) register, set the TnAMS bit to 0x1, the TnCMR bit to
0x0, and the TnMR field to 0x2.
Configure the output state of the PWM signal (whether or not it is inverted) in the TnEVENT field
of the GPTM Control (GPTMCTL) register.
Load the timer start value into the GPTM Timern Interval Load (GPTMTnILR) register.
Load the GPTM Timern Match (GPTMTnMATCHR) register with the desired value.
If a prescaler is going to be used, configure the GPTM Timern Prescale (GPTMTnPR) register
and the GPTM Timern Prescale Match (GPTMTnPMR) register.
Set the TnEN bit in the GPTM Control (GPTMCTL) register to enable the timer and begin
generation of the output PWM signal.
Type
R/W
R/W
0x0000.0000
0x0000.0000
Reset
Preliminary
Description
GPTM Configuration
GPTM TimerA Mode
LM3S1911 Microcontroller
page
See
205
206
203
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