AK4343EN AKM [Asahi Kasei Microsystems], AK4343EN Datasheet - Page 57

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AK4343EN

Manufacturer Part Number
AK4343EN
Description
Stereo DAC with HP/RCV/SPK-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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Power supply voltage for the Headphone-Amp is supplied from the HVDD pin and centered on the HVDD/2 voltage at
VBAT bit = “0”. The load resistance is 16Ω (min). HPG bit selects the output voltage (see Table 49).
When the HPMTN bit is “0”, the common voltage of Headphone-Amp falls and the outputs (HPL and HPR pins) go to
“L” (HVSS). When the HPMTN bit is “1”, the common voltage rises to HVDD/2 at VBAT bit = “0”. A capacitor between
the MUTET pin and ground reduces pop noise at power-up. Rise/Fall time constant is in proportional to HVDD voltage
and the capacitor at MUTET pin.
[Example]: A capacitor between the MUTET pin and ground = 1.0µF, HVDD=3.3V:
When PMHPL and PMHPR bits are “0”, the Headphone-Amp is powered-down, and the outputs (HPL and HPR pins) go
to “L” (HVSS).
(1) Headphone-Amp power-up (PMHPL, PMHPR bit = “1”). The outputs are still HVSS.
(2) Headphone-Amp common voltage rises up (HPMTN bit = “1”). Common voltage of Headphone-Amp is rising.
(3) Headphone-Amp common voltage falls down (HPMTN bit = “0”). Common voltage of Headphone-Amp is falling.
(4) Headphone-Amp power-down (PMHPL, PMHPR bit = “0”). The outputs are HVSS. If the power supply is switched
MS0478-E-01
Headphone Output
off or Headphone-Amp is powered-down before the common voltage goes to HVSS, some POP noise occurs.
Rise/fall time constant:
Time until the common goes to HVSS when HPMTN bit = “1”
PMHPL bit,
PMHPR bit
HPMTN bit
HPL pin,
HPR pin
Output Voltage [Vpp]
HPG bit
Figure 52. Power-up/Power-down Timing for Headphone-Amp
(1) (2)
τ
= 100ms(typ), 250ms(max)
Table 49. Headphone-Amp Output Voltage
0.6 x AVDD
- 57 -
(3)
0
(4)
“0”: 500ms(max)
0.91 x AVDD
1
[AK4343]
2006/10

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