AK4343EN AKM [Asahi Kasei Microsystems], AK4343EN Datasheet - Page 60
AK4343EN
Manufacturer Part Number
AK4343EN
Description
Stereo DAC with HP/RCV/SPK-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
1.AK4343EN.pdf
(98 pages)
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ASAHI KASEI
Power supply for Speaker-Amp (HVDD) is 2.6V to 5.25V.
Note 19. Load impedance is total impedance of series resistance (Rseries) and piezo speaker impedance at 1kHz in Figure
The DAC or LIN2/RIN2/LIN3/RIN3 signal is input to the Speaker-amp as [(L+R)/2]. The Speaker-amp is mono and BTL
output. The gain is set by SPKG1-0 bits. Output level depends on AVDD voltage and SPKG1-0 bits.
Note 40. The output level is calculated by assuming that output signal is not clipped. In actual case, output signal may be
MS0478-E-01
Speaker Output
58. Load capacitance is capacitance of piezo speaker. When piezo speaker is used, 10Ω or more series resistors
should be connected at both SPP and SPN pins, respectively.
clipped when DAC outputs 0dBFS signal. DAC output level should be set to lower level by setting digital
volume so that Speaker-Amp output level is 4.0Vpp (HVDD=3.3V) or 6.0V (HVDD=5V) or less and output
signal is not clipped.
AVDD
3.3V
Load Capacitance (max)
Load Resistance (min)
Speaker Type
SPKG1-0 bits
HVDD
3.3V
5.0V
00
01
10
11
Table 52. Speaker Type and Power Supply Range
SPKG1-0 bits
Table 54. SPK-Amp Output Level
ALC bit = “0”
00
01
10
11
00
01
10
11
Table 53. SPK-Amp Gain
+10.65dB
+12.65dB
+4.43dB
+6.43dB
Dynamic Speaker
- 60 -
30pF
8Ω
4.15Vpp (Note 40)
6.75Vpp (Note 40)
8.50Vpp (Note 40)
6.75Vpp (Note 40)
8.50Vpp (Note 40)
Gain
ALC bit = “0”
SPK-Amp Output (DAC Input = 0dBFS)
3.30Vpp
3.30Vpp
4.15Vpp
ALC bit = “1”
+12.65dB
+14.65dB
+6.43dB
+8.43dB
Piezo (Ceramic) Speaker
(LMTH1-0 bits = “00”)
6.37Vpp (Note 40)
8.02Vpp (Note 40)
6.37Vpp (Note 40)
8.02Vpp (Note 40)
Default
ALC bit = “1”
50Ω
3µF
3.11Vpp
3.92Vpp
3.11Vpp
3.92Vpp
[AK4343]
2006/10
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