A54SX08-1BG208 ETC1 [List of Unclassifed Manufacturers], A54SX08-1BG208 Datasheet - Page 14
A54SX08-1BG208
Manufacturer Part Number
A54SX08-1BG208
Description
54SX Family FPGAs
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet
1.A54SX08-1BG208.pdf
(57 pages)
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A 5 4 S X 1 6 P D C S p e c i f i ca t i on s ( 3 . 3 V P C I O p e r a t i on )
14
Symbol
V
V
V
V
V
I
I
V
V
C
C
C
Notes:
1.
2.
3.
4.
IPU
IL
CCA
CCR
CCI
IH
IL
OH
OL
IN
CLK
IDSEL
This specification should be guaranteed by design. It is the minimum voltage to which pull-up resistors are calculated to pull a floated
network. Applications sensitive to static power utilization should assure that the input buffer is conducting minimum current at this
input voltage.
Input leakage currents include hi-Z output leakage for all bi-directional buffers with tri-state outputs.
Absolute maximum pin capacitance for a PCI input is 10pF (except for CLK).
Lower capacitance on this input-only pin allows for non-resistive coupling to AD[xx].
Parameter
Supply Voltage for Array
Supply Voltage required for Internal Biasing
Supply Voltage for IOs
Input High Voltage
Input Low Voltage
Input Pull-up Voltage
Input Leakage Current
Output High Voltage
Output Low Voltage
Input Pin Capacitance
CLK Pin Capacitance
IDSEL Pin Capacitance
1
3
2
4
v3.1
Condition
0 < V
I
I
OUT
OUT
= –500 µA
= 1500 µA
IN
< V
CC
0.5V
0.7V
0.9V
Min.
–0.5
3.0
3.0
3.0
5
CC
CC
CC
5 4 S X F a m i l y F P G A s
V
0.3V
0.1V
CC
Max.
±10
3.6
3.6
3.6
10
12
8
+ 0.5
CC
CC
Units
µA
pF
pF
pF
V
V
V
V
V
V
V
V
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