ADUM3201 AD [Analog Devices], ADUM3201 Datasheet - Page 3
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ADUM3201
Manufacturer Part Number
ADUM3201
Description
Dual-Channel, Digital Isolators, Enhanced System-Level ESD Reliability
Manufacturer
AD [Analog Devices]
Datasheet
1.ADUM3201.pdf
(20 pages)
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SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
All voltages are relative to their respective ground. 4.5 V ≤ V
apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at T
Table 1.
Parameter
DC SPECIFICATIONS
SWITCHING SPECIFICATIONS
Input Supply Current, per Channel, Quiescent
Output Supply Current, per Channel, Quiescent
ADuM3200, Total Supply Current, Two Channels
ADuM3201, Total Supply Current, Two Channels
For All Models
ADuM320xAR
DC to 2 Mbps
10 Mbps (BR and CR Grades Only)
25 Mbps (CR Grade Only)
DC to 2 Mbps
10 Mbps (BR and CR Grades Only)
25 Mbps (CR Grade Only)
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Minimum Pulse Width
Maximum Data Rate
Propagation Delay
Pulse-Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching
Output Rise/Fall Time (10% to 90%)
V
V
V
V
V
V
V
V
V
V
V
V
DD1
DD2
DD1
DD2
DD1
DD2
DD1
DD2
DD1
DD2
DD1
DD2
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
Supply Current
4
3
2
5
PLH
− t
6
PHL
|
4
1
1
Symbol
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
V
V
V
V
V
V
PW
t
PWD
t
t
t
DDI (Q)
DDO (Q)
DD1 (Q)
DD2 (Q)
DD1 (10)
DD2 (10)
DD1 (25)
DD2 (25)
DD1 (Q)
DD2 (Q)
DD1 (10)
DD2 (10)
DD1 (25)
DD2 (25)
IA
PHL
PSK
PSKCD/OD
R
IH
IL
OAH
OBH
OAL
OBL
/t
, I
, t
F
IB
PLH
DD1
Rev. 0 | Page 3 of 20
Min
−10
0.7 V
V
V
V
V
V
1
20
≤ 5.5 V, 4.5 V ≤ V
DD2
DD1
DD2
DD1
DD2
,
,
− 0.1
− 0.5
DD1
,
Typ
0.4
0.5
1.3
1.0
3.5
1.7
7.7
3.1
1.1
1.3
2.6
3.1
5.3
6.4
+0.01
5.0
4.8
0.0
0.04
0.2
10
DD2
≤ 5.5 V. All minimum/maximum specifications
Max
0.8
0.6
1.7
1.6
4.6
2.8
10.0
3.9
1.5
1.8
3.4
4.0
6.8
8.3
+10
0.3 V
V
0.1
0.1
0.4
1000
150
40
100
50
DD2
DD1,
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
V
V
V
V
V
V
V
ns
Mbps
ns
ns
ns
ns
ns
ADuM3200/ADuM3201
Test Conditions
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
DC to 1 MHz logic signal freq.
DC to 1 MHz logic signal freq.
5 MHz logic signal freq.
5 MHz logic signal freq.
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
0 ≤ V
I
I
I
I
I
C
C
C
C
C
C
C
A
Ox
Ox
Ox
Ox
Ox
L
L
L
L
L
L
L
= 25°C, V
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= −20 μA, V
= −4 mA, V
= 20 μA, V
= 400 μA, V
= 4 mA, V
IA
, V
IB
≤ V
DD1
Ix
Ix
DD1
Ix
= V
Ix
Ix
= V
= V
= V
= V
= V
or V
IxL
IxL
IxH
IxL
IxH
DD2
DD2
= 5 V.