SAF-C515-1R24M Siemens Semiconductor Group, SAF-C515-1R24M Datasheet - Page 14
SAF-C515-1R24M
Manufacturer Part Number
SAF-C515-1R24M
Description
8-Bit CMOS Microcontroller
Manufacturer
Siemens Semiconductor Group
Datasheet
1.SAF-C515-1R24M.pdf
(55 pages)
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CPU
The C515 is efficient both as a controller and as an arithmetic processor. It has extensive facilities
for binary and BCD arithmetic and excels in its bit-handling capabilities. Efficient use of program
memory results from an instruction set consisting of 44 % one-byte, 41 % two-byte, and 15% three-
byte instructions. With a 6 MHz crystal, 58% of the instructions are executed in 1.0 s 10 MHz: 600).
Special Function Register PSW (Address D0 H )
Bit
CY
AC
F0
RS1
RS0
OV
F1
P
Semiconductor Group
D0 H
Bit No. MSB
D7 H
CY
Function
Carry Flag
Used by arithmetic instruction.
Auxiliary Carry Flag
Used by instructions which execute BCD operations.
General Purpose Flag
Register Bank select control bits
These bits are used to select one of the four register banks.
Overflow Flag
Used by arithmetic instruction.
General Purpose Flag
Parity Flag
Set/cleared by hardware after each instruction to indicate an odd/even
number of "one" bits in the accumulator, i.e. even parity.
RS1
0
0
1
1
D6 H
AC
D5 H
F0
RS0
0
1
0
1
RS1
D4 H
Function
Bank 0 selected, data address 00 H -07 H
Bank 1 selected, data address 08 H -0F H
Bank 2 selected, data address 10 H -17 H
Bank 3 selected, data address 18 H -1F H
14
RS0
D3 H
D2 H
OV
D1 H
F1
LSB
D0 H
P
Reset Value : 00 H
PSW
1997-08-01
C515
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