Z89175 Zilog., Z89175 Datasheet - Page 52
Z89175
Manufacturer Part Number
Z89175
Description
Voice Processing Controllers
Manufacturer
Zilog.
Datasheet
1.Z89175.pdf
(68 pages)
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DSP REGISTERS DESCRIPTION (Continued)
Z89175/Z89176
Voice Processing Controllers
DSP_port (DSP1,
DSP0)
Enable A/D
ConversionDone
StartConversion
Reserved
20/29 MHz Select --------------1-
A/D_SamplingRate---------------0
Notes:
* Default value
† Optional feature
DSP IRQ0. This bit defines the source of the DSP IRQ0 in-
terrupt.
D/A_Sampling Rate. This field defines the sampling rate
of the D/A output. It changes the period to Timer3 interrupt
and the maximum possible accuracy of the D/A Sampling
Rate (Table 18).
52
D/A_Sampling Rate
Field
Bit 8
0
1
Table 18. D/A Data Accuracy
--------76------
----------5-----
-----------4----
------------3---
-------------2--
Position
20.48 MHz
16 kHz
10 kHz
Table 17. EXT6 Analog Control Register (ACR)
Sampling Rate
29.49 MHz
Attrib
8.04 kHz
9.6 kHz
R/W
R/W
R/W
R/W
R/W
W
W
R
R
P R E L I M I N A R Y
Value
1
0
1
0
1
0
1
0
1
0
DSP0. DSP0 is a general-purpose output pin connected to
Bit 6. This bit has no special significance and can be used
to output data by writing to bit 6.
User-defined DSP
outputs
A/D Enabled
A/D Disabled
No effect
Done
Not Done
Start
Wait Timer
Return “0”
No effect
29.49 MHz*
20.48 MHz†
Label
16 kHz
8 kHz
20.48
MHz
DS97TAD0100
9.6 kHz
16 kHz
29.49
MHz*
Zilog
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