Z8F160x Zilog, Z8F160x Datasheet - Page 108

• Manufacturer Part Number: Z8F160x
• Description: Z8 Encore / Microcontrollers with Flash Memory and 10 Bit A/D Converter
• Manufacturer: Zilog

Table 55. UARTx Control 1 Register (UxCTL1)
PS017610-0404
RESET
FIELD
ADDR
BITS
R/W
BIRQ
R/W
7
0
CTSE—CTS Enable
0 = The CTS signal has no effect on the transmitter.
1 = The UART recognizes the CTS signal as an enable control from the transmitter.
PEN—Parity Enable
This bit enables or disables parity. Even or odd is determined by the PSEL bit.
0 = Parity is disabled.
1 = The transmitter sends data with an additional parity bit and the receiver receives an
additional parity bit.
PSEL—Parity Select
0 = Even parity is transmitted and expected on all received data.
1 = Odd parity is transmitted and expected on all received data.
SBRK—Send Break
This bit pauses or breaks data transmission. Sending a break interrupts any transmission in
progress, so insure that the transmitter has finished sending data before setting this bit.
0 = No break is sent.
1 = The output of the transmitter is zero.
STOP—Stop Bit Select
0 = The transmitter sends one stop bit.
1 = The transmitter sends two stop bits.
LBEN—Loop Back Enable
0 = Normal operation.
1 = All transmitted data is looped back to the receiver.
BIRQ—Baud Rate Generator Interrupt Request
This bit sets an interrupt request when the Baud Rate Generator times out and is only set if
a UART is not enabled. The is bit produces no effect when the UART is enabled.
0 = Interrupts behave as set by UART control.
1 = The Baud Rate Generator generates a receive interrupt when it counts down to zero.
MPM—Multiprocessor (9-bit) mode Select
This bit is used to enable Multiprocessor (9-bit) mode.
MPM
R/W
6
0
MPE
R/W
5
0
MPBT
R/W
F43H and F4BH
4
0
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
R/W
3
0
Reserved
R/W
2
0
RDAIRQ
R/W
1
0
Z8 Encore!
IREN
R/W
0
0
UART
®
90