HV51V7403HGL-5 Hynix Semiconductor, HV51V7403HGL-5 Datasheet
HV51V7403HGL-5
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HV51V7403HGL-5 Summary of contents
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DESCRIPTION The HY51V(S)17403HG/HGL is the new generation dynamic RAM organized 4,194,304 words x 4bit. HY51V(S)17403HG/HGL has realized higher density, higher performance and various functions by utiliz- ing advanced CMOS process technology. The HY51V(S)17403HG/HGL offers Extended Data Out Page- Mode as ...
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PIN CONFIGURATION I/ RAS 5 A11 6 A10 24(26) Pin Plastic SOJ PIN DESCRIPTION Pin /RAS /CAS /WE /OE A0-A11 ...
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ABSOLUTE MAXIMUM RATINGS Parameter Ambient Temperature Storage Temperature Voltage on Any Pin relative Voltage on V relative Short Circuit Output Current Power Dissipation Recommended DC OPERATING CONDITIONS Parameter Power Supply Voltage Input High ...
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DC CHARACTERISTICS Symbol Output Level VOH Output Level voltage(Iout= -2mA) Output Level VOL Output Level voltage(Iout=2mA) Operating current Average power supply operating current ICC1 ( /RAS, /CAS Cycling : tRC = tRC min) Standby current (TTL interface) I Power supply ...
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CAPACITANCE (Vcc=3.3V +/-10%, TA=25 C) Parameter Input capacitance (Address) Input capacitance (Clocks) Output capacitance (Data-in, Data-out) Note : 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. /CAS = V to disable D IH out AC CHARACTERISTICS ...
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Parameter /OE to Din delay time /OE delay time from Din /CAS delay time from Din Transition time ( Rise and Fall) Refresh period Refresh period (L-version) Read Cycle Parameter Access time from /RAS Access time from /CAS Access time ...
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Write Cycle Parameter Write command set-up time Write command hold time Write command pulse width Write command to /RAS lead time Write command to /CAS lead time Data-in set-up time Data-in hold time Read-Modify-Write Cycle Parameter Read-modify-write cycle time /RAS ...
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EDO Page Mode Cycle Parameter EDO mode cyle time EDO mode /RAS pulse width Access time from /CAS precharge /RAS hold time from /CAS precharge Output data hold time from /CAS low /CAS hold time referred /OE /CAS to /OE ...
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Notes : 1. AC measurements assume initial pause of 200us is required after power up followed by a minimum of eight initialization cycles ( any combination of cycles containing /RAS-only refresh or /CAS-before-/RAS refresh) If the internal ...
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Access time is determined by the longest among t 18. The 16M DRAM offers 16 bit time saving parallel test mode. Address CA0 and CA1 for the 4Mx4 are don’ t care during test mode. Test mode is set ...
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PACKAGE INFORMATION 24(26)pin SOJ 0.050(1.27) TYP 24(26)pin TSOP-II 0.670(17.04) MIN 0.678(17.24) MAX 0.012(0.30) MIN 0.020(0.50) MAX Rev.0.1/Apr.01 0.661(16.80) MIN 0.669(17.00) MAX 0.128(3.25) MIN 0.147(3.75) MAX 0.026(0.66) MIN 0.032(0.81) MAX 0.015(0.38) MIN 0.020(0.50) MAX 0.037(0.95) MIN 0.041(1.05) MAX 0.047(1.20) 0.050(1.27) 0.003(0.08) ...