SAA5500PS Philips Semiconductors, SAA5500PS Datasheet - Page 38

• Manufacturer Part Number: SAA5500PS
• Description: Standard TV Microcontrollers with On-Screen Display(OSD)
• Manufacturer: Philips Semiconductors

Philips Semiconductors
16 I
The I
serial clock (SCL) line. The definition of the I
protocol can be found in the document “The I
how to use it (including specification)” . This document may
be ordered using the code 9398 393 40011.
The device operates in four modes:
The microcontroller peripheral is controlled by the Serial
Control SFR (S1CON) and its status is indicated by the
Status SFR (S1STA). Information is transmitted/received
to/from the I
Slave Address SFR (S1ADR) is used to configure the
slave address of the peripheral.
The byte level I
serial port on the P8xCE558, except for the clock rate
selection bits CR<2:0> in S1CON. The operation of the
subsystem is described in detail in the “P8xCE558 data
sheet” .
16.1
Two I
SCL1/SDA1. The selection of the port is done using
TXT21.I
port is enabled, any information transmitted from the
device goes onto the enabled port. Any information
transmitted to the device can only be acted on if the port is
enabled.
If both ports are enabled then data transmitted from the
device is seen on both ports, however data transmitted to
the device on one port can not be seen on the other port.
17 MEMORY INTERFACE
The memory interface controls access to the embedded
Dynamic Random Access Memory (DRAM), refreshing of
the DRAM and page clearing. The DRAM is shared
between Data Capture, display and microcontroller
sections. The Data Capture section uses the DRAM to
store acquired information that has been requested.
The display reads from the DRAM information and
converts it into RGB values. The microcontroller uses the
DRAM as embedded auxiliary RAM.
1999 Oct 27
Master transmitter
Master receiver
Slave transmitter
Slave receiver.
Standard TV microcontrollers with
On-Screen Display (OSD)
2
2
2
C-BUS SERIAL I/O
C-bus consists of a serial data (SDA) line and a
C-bus ports are available SCL0/SDA0 and
I
2
2
C-bus port selection
C PORT 0 and TXT21.I
2
C-bus using the Data SFR (S1DAT) and the
2
C-bus serial port is identical to the I
2
C PORT 1. When the
2
2
C-bus
C-bus and
2
C-bus
38
17.1
The memory is partitioned into two distinct areas, the
dedicated Auxiliary RAM area, and the Display RAM area.
The Display RAM area when not being used for Data
Capture or display, can be used as an extension to the
auxiliary RAM area.
17.1.1
The Auxiliary RAM is not initialised at power-up.
The contents of the Auxiliary RAM are maintained during
Idle mode, but are lost if Power-down mode is entered.
17.1.2
The Display RAM is initialised on power-up to a value
of 20H throughout. The contents of the Display RAM are
maintained when entering Idle mode. If Idle mode is exited
using an interrupt then the contents are unchanged, if Idle
mode is exited using a reset then the contents are
initialised to 20H.
17.2
The dedicated Auxiliary RAM area occupies a maximum of
8 kbytes, with an address range from 0000H to 1FFFH.
The Display RAM occupies a maximum of 10 kbytes with
an address range from 2000H to 47FFH for TXT mode
(see Fig.13).
17.3
The memory can be addressed by the microcontroller in
two ways, either directly using a MOVX command, or via
Special Function Registers depending on what address is
required.
The Display memory in the range 2000H to 47FFH can
either be directly accessed using the MOVX, or via the
Special Function Registers.
17.3.1
The Display memory when in TXT mode (see Fig.14) is
configured as 40 columns wide by 25 rows and occupies
1K
10 display pages. Using TXT15.BLOCK<3:0>, the
required display page can be selected to be written to.
The row and column within that block is selected using
TXT9.R<4:0> and TXT10.C<5:0>. The data at the
selected position can be read or written using
TXT11.D<7:0>.
8 bits of memory. There can be a maximum of
Memory structure
Memory mapping
Addressing memory
A
D
TXT D
UXILIARY
ISPLAY
ISPLAY MEMORY
RAM
RAM
SFR
Preliminary specification
ACCESS
SAA55xx