AM29DL400BB-120EC AMD [Advanced Micro Devices], AM29DL400BB-120EC Datasheet - Page 18

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AM29DL400BB-120EC

Manufacturer Part Number
AM29DL400BB-120EC
Description
4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
the non-erasing bank. The system can determine the
status of the erase operation by reading DQ7, DQ6,
DQ2, or RY/BY# in the erasing bank. Refer to the Write
Operation Status section for information on these sta-
tus bits.
Once the sector erase operation has begun, only the
Erase Suspend command is valid. All other commands
are ignored. However, note that a hardware reset im-
mediately terminates the erase operation. If that oc-
curs, the sector erase command sequence should be
reinitiated once that bank has returned to reading array
data, to ensure data integrity.
Figure 4 illustrates the algorithm for the erase opera-
tion. Refer to the Erase and Program Operations tables
in the AC Characteristics section for parameters, and
Figure 18 section for timing diagrams.
Erase Suspend/Erase Resume Commands
The Erase Suspend command, B0h, allows the sys-
tem to interrupt a sector erase operation and then
read data from, or program data to, any sector not se-
lected for erasure. The bank address is required when
writing this command. This command is valid only dur-
ing the sector erase operation, including the 50 µs
time-out period during the sector erase command se-
quence. The Erase Suspend command is ignored if
written during the chip erase operation or Embedded
Program algorithm.
When the Erase Suspend command is written during
the sector erase operation, the device requires a max-
imum of 20 µs to suspend the erase operation. How-
ever, when the Erase Suspend command is written
during the sector erase time-out, the device immedi-
ately terminates the time-out period and suspends the
erase operation.
After the erase operation has been suspended, the
bank enters the erase-suspend-read mode. The sys-
tem can read data from or program data to any sector
not selected for erasure. (The device “erase suspends”
all sectors selected for erasure.) Reading at any ad-
dress within erase-suspended sectors produces status
information on DQ7–DQ0. The system can use DQ7,
or DQ6 and DQ2 together, to determine if a sector is
actively erasing or is erase-suspended. Refer to the
Write Operation Status section for information on these
status bits.
After an erase-suspended program operation is com-
plete, the bank returns to the erase-suspend-read
mode. The system can determine the status of the pro-
18
P R E L I M I N A R Y
Am29DL400B
gram operation using the DQ7 or DQ6 status bits, just
as in the standard Byte Program operation. Refer to the
Write Operation Status section for more information.
In the erase-suspend-read mode, the system can also
issue the autoselect command sequence. Refer to the
Autoselect Mode and Autoselect Command Sequence
sections for details.
To resume the sector erase operation, the system must
write the Erase Resume command. The bank address
of the erase-suspended bank is required when writing
this command. Further writes of the Resume command
are ignored. Another Erase Suspend command can be
written after the chip has resumed erasing.
Notes:
1. See Table 5 for erase command sequence.
2. See the section on DQ3 for information on the sector
erase timer.
No
Figure 4. Erase Operation
Command Sequence
Data Poll to Erasing
Erasure Completed
Bank from System
Write Erase
Data = FFh?
(Notes 1, 2)
START
Yes
Embedded
Erase
algorithm
in progress
21606C-8

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