EVAL-AD73311EB AD [Analog Devices], EVAL-AD73311EB Datasheet - Page 7
EVAL-AD73311EB
Manufacturer Part Number
EVAL-AD73311EB
Description
Low Cost, Low Power CMOS General Purpose Analog Front End
Manufacturer
AD [Analog Devices]
Datasheet
1.EVAL-AD73311EB.pdf
(36 pages)
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TIMING CHARACTERISTICS
Parameter
Clock Signals
Serial Port
t
t
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
9
10
11
12
13
t
2
Limit at
T
61
24.4
24.4
t
0.4 × t
0.4 × t
20
0
10
10
10
10
30
1
t
1
A
= –40 C to +85 C
SCLK
1
1
MCLK
t
3
(AVDD = +5 V
otherwise noted)
*
t
13
*
SCLK IS INDIVIDUALLY PROGRAMMABLE
IN FREQUENCY (MCLK/4 SHOWN HERE).
t
1
10%; DVDD = +5 V
t
5
t
4
t
2
Unit
ns min
ns min
ns min
ns min
ns min
ns min
ns typ
ns typ
ns typ
ns typ
ns typ
ns typ
ns typ
t
6
10%; AGND = DGND = 0 V; T
TO OUTPUT
t
3
PIN
15pF
C
Description
See Figure 1
MCLK Period
MCLK Width High
MCLK Width Low
See Figures 3 and 4
SCLK Period
SCLK Width High
SCLK Width Low
SDI/SDIFS Setup Before SCLK Low
SDI/SDIFS Hold After SCLK Low
SDOFS Delay from SCLK High
SDOFS Hold After SCLK High
SDO Hold After SCLK High
SDO Delay from SCLK High
SCLK Delay from MCLK
L
100 A
100 A
A
= T
I
I
OH
OL
MlN
to T
AD73311
MAX
+2.1V
, unless
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