LF2249 LODEV [LOGIC Devices Incorporated], LF2249 Datasheet

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LF2249

Manufacturer Part Number
LF2249
Description
12 x 12-bit Digital Mixer
Manufacturer
LODEV [LOGIC Devices Incorporated]
Datasheet
DEVICES INCORPORATED
DEVICES INCORPORATED
FEATURES
LF2249 B
40 MHz Data and Computation Rate
Two 12 x 12-bit Multipliers with
Individual Data Inputs
Separate 16-bit Input Port for
Cascading Devices
Independent, User-Selectable 1–16
Clock Pipeline Delay for Each Data
Input
User-Selectable Rounding of Products
Fully Registered, Pipelined
Architecture
Three-State Outputs
Fully TTL Compatible
Replaces TRW/Raytheon/Fairchild
TMC2249
120-pin PQFP
NOTE: NUMBERS IN REGISTERS INDICATED
CAS
CASEN
SWAP
NEG
RND
NUMBER OF PIPELINE DELAYS.
CLK
15-0
OE
FT
LOCK
1
D
4
4
IAGRAM
16
ADEL
3-0
A
1–16
11-0
ENA
3
2's COMP
The LF2249 is a high-speed digital
mixer comprised of two 12-bit
multipliers and a 24-bit accumulator.
All multiplier inputs are user acces-
sible, and each can be updated on
every clock cycle. The LF2249 utilizes
a pipelined architecture with fully
registered inputs and outputs and an
asynchronous three-state output
enable control for optimum flexibility.
Independent input register clock
enables allow the user to hold the
data inputs over multiple clock cycles.
Each multiplier input also includes a
user-selectable 1-16 clock pipeline
delay. The output of each multiplier
can be independently negated under
DESCRIPTION
BDEL
3-0
B
16
1–16
11-0
MS
ENB
1
16
16
1
S
2 : 1
15-0
0
CDEL
3-0
C
1–16
11-0
24
12 x 12-bit Digital Mixer
ENC
0
2's COMP
2 : 1
16
user control for subtraction of prod-
ucts. The sum of the products can
also be internally rounded to 16 bits
during the accumulation process.
A separate 16-bit input port con-
nected to the accumulator is included
to allow cascading of multiple
LF2249s. Access to all 24 bits of the
accumulator is gained by switching
between upper or lower 16-bit words.
The accumulated output data is
updated on every clock cycle.
All inputs and outputs of the LF2249
are registered on the rising edge of
clock, except for OE. Internal pipeline
registers for all data and control
inputs are provided to maintain
1
DDEL
Video Imaging Products
LS
12 x 12-bit Digital Mixer
3-0
D
1–16
11-0
END
LF2249
4
4
08/16/2000–LDS.2249-J
LF2249
NEG
ACC
2
10
11
1
2
3
4
5
6
7
8
9

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