ISPGDX LATTICE [Lattice Semiconductor], ISPGDX Datasheet - Page 12
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ISPGDX
Manufacturer Part Number
ISPGDX
Description
In-System Programmable Generic Digital Crosspoint
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet
1.ISPGDX.pdf
(23 pages)
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Table 3. I/O Shift Register Order
Table 4. ispGDX Device ID Codes
The ispGDXV/VA devices provide IEEE1149.1a test
capability and ISP programming through a standard
Boundary Scan Test Access Port (TAP) interface.
The boundary scan circuitry on the ispGDXV/VA Family
operates independently of the programmed pattern. This
allows customers using boundary scan test to have full
test capability with only a single BSDL file.
The ispGDXV/VA devices are identified by the 32-bit
JTAG IDCODE register. The device ID assignments are
listed in Table 4.
The ispJTAG programming is accomplished by execut-
ing Lattice private instructions under the Boundary Scan
State Machine.
Contact Lattice Technical Support to obtain more de-
tailed programming information.
Boundary Scan
ispGDX80A
ispGDX120A
ispGDX160/A
ispGDX80A
ispGDX120A
ispGDX160/A
DEVICE
DEVICE
SDI/TDI, I/O B10 .. B19, I/O C0 .. C19, I/O D0 .. D9, RESET, Y1/TOE, Y0, I/O B9 .. B0, I/O A19.. A0,
I/O D19 .. D10, SDO/TDO
SDI/TDI, I/O B15 .. B29, I/O C0 .. C29, I/O D0 .. D14, TOE, Y2, Y3, RESET, Y1, Y0, I/O B14 .. B0,
I/O A29.. A0, I/O D29 .. D15, SDO/TDO
SDI/TDI, I/O B20 .. B39, I/O C0 .. C39, I/O D0 .. D19, TOE, Y2, Y3, RESET, Y1, Y0, I/O B19 .. B0,
I/O A39.. A0, I/O D39 .. D20, SDO/TDO
8-BIT ISP ID
0111 0111
0111 1000
0111 1001
0000 0000 0010 0101 0001 0000 0100 0011
0000 0000 0010 0101 0010 0000 0100 0011
0000 0000 0010 0101 0011 0000 0100 0011
32-BIT BOUNDARY SCAN IDCODE
I/O SHIFT REGISTER ORDER
12
Specifications ispGDX Family
GDX ID Codes
I/O Shift Reg Order/ispGDX