73K324L-IGT ETC [List of Unclassifed Manufacturers], 73K324L-IGT Datasheet - Page 6

• Manufacturer Part Number: 73K324L-IGT
• Description: CCITT V.22bis, V.22, V.21, V.23, Bell 212A Single-Chip Modem
• Manufacturer: ETC [List of Unclassifed Manufacturers]

73K324L
CCITT V.22bis, V.22, V.21, V.23, Bell 212A
Single-Chip Modem
REGISTER DESCRIPTIONS
Eight 8-bit internal registers are accessible for
control and status monitoring. The registers are
accessed in read or write operations by addressing
the A0, A1 and A2 address lines in Serial mode, or
the AD0, AD1 and AD2 lines in Parallel mode. The
address lines are latched by ALE. Register CR0
controls the method by which data is transferred
over the phone line. CR1 controls the interface
between the microprocessor and the 73K324L
REGISTER BIT SUMMARY
NOTE:
REGISTER
CONTROL
REGISTER
CONTROL
REGISTER
REGISTER
CONTROL
REGISTER
CONTROL
REGISTER
CONTROL
REGISTER
REGISTER
SPECIAL
DETECT
TONE
REGISTER
ID
0
1
2
3
When a register containing reserved control bits is written into, the reserved bits must be programmed as
0's.
X = Undefined, mask in software.
CR0
CR1
CR2
CR3
SR
DR
TR
ID
ADDRESS
AD - A0
000
001
010
011
100
101
101
110
MODULATION
TRANSMIT
CONTROL
PATTERN
OUTPUT
RECEIVE
OPTION
TXDALT
LEVEL
RXD
D7
0
1
0
1
MODULATION
GUARD TONE/
SCT/CALLING
TRANSMIT
PATTERN
TRANSMIT
PATTERN
REGISTER
TX/RXCLK
TRISTATE
SPECIAL
TX BAUD
ACCESS
S1 DET
CLOCK
TONE
TYPE
D6
0
1
1
MODULATION
INTERRUPT
TRANSMIT
ANSWER
INITIALIZE
RX UNSCR.
RECEIVE
ENABLE
DETECT
DATA
TONE
CALL
TYPE
DATA
D5
0
0
1
6
SCRAMBLER/
ADD PH. EQ.
TRANSMIT
TRANSMIT
TRANSMIT
BYPASS
RECEIVE
UNSCR.
DETECT
internal state. DR is a detect register which provides
an indication of monitored modem status conditions.
TR, the tone control register, controls the DTMF
generator, answer, guard tones, SCT, calling tone,
and RXD output gate used in the modem initial
connect sequence. CR2 is the primary DSP control
interface and CR3 controls transmit attenuation and
receive gain adjustments. All registers are read/write
except for DR and ID which are read only. Register
control and status bits are identified below:
MODE
BOOST
(V.23)
MARK
DTMF
GAIN
DATA BIT NUMBER
D4
S1
0
2
0
TRANSMIT
CONTROL
TRANSMIT
CARRIER
DETECT
SOURCE
DTMF3
16 WAY
MODE
ATTEN.
CLK
TXD
D3
1
X
3
4 WIRE FDX
TRANSMIT
TRANSMIT
SPECIAL
SELECT 1
DETECT
DTMF2/
MODE
RESET
ATTEN.
RESET
TONE
DSP
D2
SQ
0
2
X
OVERSPEED
TRANSMIT
PROGRESS
TRANSMIT
SELECT 0
ENABLE
DETECT
DTMF1/
INHIBIT
ATTEN.
MODE
TRAIN
TEST
CALL
D1
SQ
1
1
X
DTMF0/GUARD/
CALLING/SCT
ORIGINATE
EQUALIZER
ANSWER/
TRANSMIT
ANSWER/
QUALITY
ENABLE
SIGNAL
ATTEN.
MODE
TEST
D0
0
0
0
X