HI-3597 HOLTIC [Holt Integrated Circuits], HI-3597 Datasheet - Page 6

• Manufacturer Part Number: HI-3597
• Description: Octal ARINC 429 Receivers with Label Recognition and SPI Interface
• Manufacturer: HOLTIC [Holt Integrated Circuits]

ARINC 429 Data Format
Control Register bit CR9 controls how individual bits in
the received ARINC word are mapped to the HI-359x
SPI data word during data read operations. Table 5
describes this mapping.
ARINC 429 Receiver
ARINC Bus Interface
Figure 3 shows the input circuit for each on-chip ARINC
429 line receiver. The ARINC 429 specifi cation requires
detection levels summarized in Table 6.
SPI Order
ARINC bit
CR11 = 0
ARINC bit
CR11 = 1
STATE
Table 6. ARINC 429 Detection Levels
ZERO
NULL
ONE
32
32
1
Table 5. SPI / ARINC bit-mapping
31 - 11
31 - 11
2 - 22
Data
Data
SPI / ARINC bit-mapping
DIFFERENTIAL VOLTAGE
23
10
10
+2.5 Volts to -2.5 Volts
+6.5 Volts to +13 Volts
-6.5 Volts to -13 Volts
24
9
9
25
1
8
26
2
7
HI-3596, HI-3597, HI-3598, HI-3599
27
3
6
28
4
5
29
HOLT INTEGRATED CIRCUITS
5
4
30
6
3
31
7
2
32
8
1
6
The HI-359x family guarantees recognition of these lev-
els with a common mode Voltage with respect to GND
less than ±30V for the worst case condition (3.15V sup-
ply and 13V signal level).
The tolerances in the design guarantee detection of
the above levels, so the actual acceptance ranges are
slightly larger. If the ARINC signal is out of the actual
acceptance ranges, including the nulls, the chip rejects
the data.
Receiver Logic Operation
Figure 4 is a block diagram showing the logic for each
receiver.
Bit Timing
The ARINC 429 specifi cation defi nes timing tolerances
for received data according to Table 7.
RINA-40
RINB-40
Pulse Rise Time
Pulse Fall Time
Table 7. ARINC 429 Receiver Timing Tolerances
RINA
RINB
Pulse Width
Bit Rate
Figure 3. ARINC Receiver Input
GND
GND
VDD
VDD
100Kbps ± 1%
HIGH SPEED
1.5 ± 0.5μs
1.5 ± 0.5μs
5μs ± 5%
DIFFERENTIAL
AMPLIFIERS
12K - 14.5Kbps
34.5 to 41.7μs
LOW SPEED
COMPARATORS
10 ± 5μs
10 ± 5μs
ONE
NULL
ZERO