XCB56364PV100 MOTOROLA [Motorola, Inc], XCB56364PV100 Datasheet - Page 62
XCB56364PV100
Manufacturer Part Number
XCB56364PV100
Description
24-Bit Audio Digital Signal Processor
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.XCB56364PV100.pdf
(162 pages)
- Current page: 62 of 162
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Notes:
Specifications
External Memory Expansion Port (Port A)
2-42
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
No.
Table 2-16 DRAM Out-of-Page and Refresh Timings, Fifteen Wait States
CAS assertion to WR deassertion
RAS assertion to WR deassertion
WR assertion pulse width
WR assertion to RAS deassertion
WR assertion to CAS deassertion
Data valid to CAS assertion (write)
CAS assertion to data not valid (write)
RAS assertion to data not valid (write)
WR assertion to CAS assertion
CAS assertion to RAS assertion (refresh)
RAS deassertion to CAS assertion (refresh)
RD assertion to RAS deassertion
RD assertion to data valid
RD deassertion to data not valid
WR assertion to data active
WR deassertion to data high impedance
1.
2.
3.
4.
The number of wait states for out-of-page access is specified in the DCR.
The refresh period is specified in the DCR.
RD deassertion will always occur after CAS deassertion; therefore, the restricted timing is t
t
Either t
GZ
.
RCH
Characteristics
or t
RRH
Freescale Semiconductor, Inc.
must be satisfied for read cycles.
For More Information On This Product,
DSP56364 Advance Information
3
Go to: www.freescale.com
3
Symbol
t
t
t
t
t
t
t
t
t
WCH
WCR
t
RWL
CWL
WCS
ROH
t
t
DHR
CSR
RPC
t
t
WP
DH
GA
DS
GZ
15.75
14.25
15.5
8.75
6.25
9.75
4.75
15.5
0.75
9.5
9.5
1.5
14
Expression
6
0.25
T
T
T
T
T
C
T
T
T
T
T
T
T
C
C
T
T
C
C
C
C
C
C
C
C
C
C
C
T
4.2
5.7
C
4.2
4.3
4.0
4.5
4.0
4.0
4.0
4.0
4.0
0.3
4.3
4.3
150.5
153.2
138.2
151.0
55.8
90.8
83.5
58.5
93.5
90.7
11.0
43.5
Min
0.0
7.2
1, 2
—
—
(continued)
MOTOROLA
134.3
OFF
Max
2.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
and not
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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