H8S2110B RENESAS [Renesas Technology Corp], H8S2110B Datasheet - Page 121
H8S2110B
Manufacturer Part Number
H8S2110B
Description
Renesas 16-Bit Single-Chip Microcomputer Renesas H8S Family/H8S/2100 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S2110B.pdf
(559 pages)
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5.6.4
Table 5.5 shows interrupt response times
and execution of the first instruction in the interrupt handling routine. The execution status
symbols used in table 5.5 are explained in table 5.6.
Table 5.5
No. Execution Status
1
2
3
4
5
6
Total (using on-chip memory)
Notes: 1. Two states in case of internal interrupt.
Table 5.6
Symbol
Instruction fetch S
Branch address read S
Stack manipulation S
Interrupt priority determination *
Number of wait states until executing
instruction ends *
PC, CCR stack save
Vector fetch
Instruction fetch *
Internal processing *
2. Refers to MULXS and DIVXS instructions.
3. Prefetch after interrupt acceptance and prefetch of interrupt handling routine.
4. Internal processing after interrupt acceptance and internal processing after vector fetch.
Interrupt Response Times
Interrupt Response Times
Number of States in Interrupt Handling Routine Execution Status
I
K
2
3
J
4
1
Object of Access
Internal Memory
1
the intervals between generation of an interrupt request
3
1 to (19 + 2·S
2·S
S
2·S
2
Normal Mode
11 to 31
I
K
I
Rev. 2.00 Mar 21, 2006 page 83 of 518
I
)
Section 5 Interrupt Controller
Advanced Mode
3
1 to (19 + 2·S
2·S
2·S
2·S
2
12 to 32
K
I
I
REJ09B0299-0200
I
)
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