ATTINY26L8SU SL383 Atmel, ATTINY26L8SU SL383 Datasheet - Page 26
ATTINY26L8SU SL383
Manufacturer Part Number
ATTINY26L8SU SL383
Description
MCU 8-Bit ATtiny AVR RISC 2KB Flash 3.3V/5V 20-Pin SOIC T/R
Manufacturer
Atmel
Datasheet
1.ATTINY26L8PU.pdf
(185 pages)
- Current page: 26 of 185
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Clock Sources
26
ATtiny26(L)
The device has the following clock source options, selectable by Flash Fuse bits as
shown below on Table 3. The clock from the selected source is input to the AVR clock
generator, and routed to the appropriate modules.The use of pins PB5 (XTAL2), and
PB4 (XTAL1) as I/O pins is limited depending on clock settings, as shown below in
Table 4.
Table 3. Device Clocking Options Select
Table 4. PB5, and PB4 Functionality vs. Device Clocking Options
Note:
The various choices for each clocking option is given in the following sections. When the
CPU wakes up from Power-down, the selected clock source is used to time the start-up,
ensuring stable oscillator operation before instruction execution starts. When the CPU
starts from Reset, there is as an additional delay allowing the power to reach a stable
level before commencing normal operation. The Watchdog Oscillator is used for timing
this real-time part of the start-up time. The number of WDT Oscillator cycles used for
Device Clocking Option
External Crystal/Ceramic Resonator
External Low-frequency Crystal
External RC Oscillator
Calibrated Internal RC Oscillator
External Clock
PLL Clock
Device Clocking Option
External Clock
Internal RC Oscillator
Internal RC Oscillator
Internal RC Oscillator
Internal RC Oscillator
External RC Oscillator
External RC Oscillator
External RC Oscillator
External RC Oscillator
External Low-frequency Oscillator
External Crystal/Resonator Oscillator
External Crystal/Resonator Oscillator
External Crystal/Resonator Oscillator
External Crystal/Resonator Oscillator
External Crystal/Resonator Oscillator
External Crystal/Resonator Oscillator
PLL
1. For all fuses “1” means unprogrammed while “0” means programmed.
PLLCK
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
CKSEL [3:0]
PLLCK
0000
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0001
0001
0010
0011
0100
1
1
1
1
1
0
(1)
XTAL1
XTAL1
XTAL1
XTAL1
XTAL1
XTAL1
XTAL1
XTAL1
XTAL1
XTAL1
XTAL1
XTAL1
PB4
I/O
I/O
I/O
I/O
I/O
1111 - 1010
1000 - 0101
0100 - 0001
CKSEL3..0
1477J–AVR–06/07
1001
0000
0001
XTAL2
XTAL2
XTAL2
XTAL2
XTAL2
XTAL2
XTAL2
PB5
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
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