ATTINY26L8SU SL383 Atmel, ATTINY26L8SU SL383 Datasheet - Page 51

• Manufacturer Part Number: ATTINY26L8SU SL383
• Description: MCU 8-Bit ATtiny AVR RISC 2KB Flash 3.3V/5V 20-Pin SOIC T/R
• Manufacturer: Atmel

1477J–AVR–06/07
AIN0: Analog Comparator Positive input and ADC5: ADC input channel 5
port pin as input with the internal pull-up switched off to avoid the digital port function
from interfering with the function of the Analog Comparator or analog to digital
converter.
PCINT1: Pin Change Interrupt 1 pin. Pin change interrupt is enabled on pin when global
interrupt is enabled, pin change interrupt is enabled and the alternate function do not
mask the interrupt. The masking alternate function is the Analog Comparator. Digital
input is enabled on pin PA6 also in SLEEP modes, if the pin change interrupt is enabled
and not masked by the alternate function.
• ADC4, ADC3 Port – A, Bit 5, 4
ADC4/ADC3: ADC Input Channel 4 and 3. Configure the port pins as inputs with the
internal pull-ups switched off to avoid the digital port function from interfering with the
function of the analog to digital converter.
• AREF/PCINT1 Port – A, Bit 3
AREF: External Reference for ADC. Pullup and output driver are disabled on PA3 when
the pin is used as an external reference or Internal Voltage Reference (2.56V) with
external capacitor at the AREF pin by setting (one) the bit REFS0 in the ADC Multiplexer
Selection Register (ADMUX).
PCINT1: Pin Change Interrupt 1 pin. Pin change interrupt is enabled on pin when global
interrupt is enabled, pin change interrupt is enabled and the alternate function do not
mask the interrupt. The masking alternate function is the pin usage as an analog refer-
ence for the ADC. Digital input is enabled on pin PA3 also in SLEEP modes, if the pin
change interrupt is enabled and not masked by the alternate function.
Table 24. Overriding Signals for Alternate Functions in PA7..PA4
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
PA7/ADC6/
AIN1/PCINT1
0
0
0
0
0
0
PCINT1_ENABLE
ACSR[ACD]
1
PCINT1
ADC6 INPUT, AIN1
(1)
•
PA6/ADC5/
AIN0/PCINT1
0
0
0
0
0
0
PCINT1_ENABLE
ACSR[ACD]
1
PCINT1
ADC5 INPUT, AIN0
(1)
•
PA5/ADC4
0
0
0
0
0
0
0
0
–
ADC4 INPUT
ATtiny26(L)
.
PA4/ADC3
0
0
0
0
0
0
0
0
–
ADC3 INPUT
Configure the
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