AS4C8M16S-7BCN Alliance Memory, AS4C8M16S-7BCN Datasheet - Page 11
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AS4C8M16S-7BCN
Manufacturer Part Number
AS4C8M16S-7BCN
Description
DRAM 128Mb, 3.3V, 143Mhz 8M x 16 SDRAM
Manufacturer
Alliance Memory
Datasheet
1.AS4C8M16S-7BCN.pdf
(53 pages)
Specifications of AS4C8M16S-7BCN
Rohs
yes
Data Bus Width
16 bit
Organization
8 M x 16
Memory Size
128 MB
Maximum Clock Frequency
143 MHz
Access Time
5 ns, 5.4 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
3 V
Maximum Operating Current
120 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
7
8
FEBRUARY 2011
Write and AutoPrecharge command (RAS# = "H", CAS# = "L", WE# = "L", BAs = Bank, A10 = "H",
A0-A8 = Column Address)
the write operation. Once this command is given, any subsequent command cannot occur within a
time delay of {(burst length -1) + t
performed in this command and the auto precharge function is ignored.
Mode Register Set command programs the values of CAS# latency, Addressing Mode and Burst
Length in the Mode register to make SDRAM useful for a variety of different applications. The default
values of the Mode Register after power-up are undefined; therefore this command must be issued
at the power-up sequence. The state of pins A0~A9 and A11 in the same cycle is the data written to
the mode register. Two clock cycles are required to complete the write in the mode register (refer to
the following figure). The contents of the mode register can be changed using the same command
and the clock cycle requirements during operation as long as all banks are in the idle state.
Note: The DQMs can remain low in this example if the length of the write burst is 1 or 2.
CLK
DQM
COMMAND
DQ
COMMAND
ADDRESS
DQ
CLK
Mode Register Set command (RAS# = "L", CAS# = "L", WE# = "L", A0-A11 = Register Data)
The Write and AutoPrecharge command performs the precharge operation automatically after
The mode register stores the data for controlling the various operating modes of SDRAM. The
Figure 14. Burst Write with Auto-Precharge
t
DAL
=t
Bank A
Activate
WRITE
T0
T0
BANK
COL n
WR
DIN
N
+t
RP
T1
NOP
T1
NOP
DIN
N+1
Figure 13. Write to Precharge
tWR
T2
NOP
NOP
T2
WR
Auto Precharge
Precharge
BANK(S)
+ t
T3
DIN A
Write A
T3
RP
0
(min.)}. At full-page burst, only the write operation is
T4
11
NOP
DIN A
NOP
T4
1
tRP
T5
NOP
NOP
T5
t
DAL
T6
Activate
NOP
Begin AutoPrecharge
Bank can be reactivated at
completion of t
Don’t Care
ROW
T6
(Burst Length = 2)
T7
NOP
NOP
T7
DAL
T8
NOP
AS4C8M16S
T9
Activate
Bank A