IS49NLC36160-25EBL ISSI, IS49NLC36160-25EBL Datasheet - Page 11

• Manufacturer Part Number: IS49NLC36160-25EBL
• Description: DRAM 576M, x36, 400Mhz RLDRAM2
• Manufacturer: ISSI

Specifications of IS49NLC36160-25EBL

• Rohs: yes
• Organization: 16 M x 36
• Package / Case: FBGA-144
• Memory Size: 576 Mbit
• Maximum Clock Frequency: 400 MHz
• Access Time: 2.5 ns
• Supply Voltage - Max: 2.63 V
• Supply Voltage - Min: 2.38 V
• Maximum Operating Current: 380 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT

IS49NLC96400,IS49NLC18320,IS49NLC36160
Clock Input Example
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. CK and CK# must cross within the region.
11. CK and CK# must meet at least V
12. Minimum peak-to-peak swing.
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. 00F, 12/4/2012
V
V
DDQ
DKx and DKx# have the same requirements as CK and CK#.
All voltages referenced to V
Tests for AC timing, IDD and electrical AC and DC characteristics may be conducted at normal reference/supply voltage levels; but the related specifications and
device operations are tested for the full voltage range specified.
AC timing and IDD tests may use a V
CK/CK#), and parameters specifications are tested for the specified AC input levels under normal use conditions. The minimum slew rate for the input signals
used to test the device is 2V/ns in the range between V
The AC and DC input level specifications are as defined in the HSTL Standard (i.e. the receiver will effectively switch as a result of the signal crossing the AC input
level, and will remain in that state as long as the signal does not ring back above[below] the DC input LOW[HIGH] level).
The CK/CK# input reference level (for timing referenced to CK/CK#) is the point at which CK and CK# cross. The input reference level for signal other than CK/CK#
is V
CK and CK# input slew rate must be ≥ 2V/ns (≥ 4V/ns if measured differentially).
V
The value of V
DDQ
ID
/2+0.15V, V
REF
is the magnitude of the difference between the input level on CK and input level on CK#.
/2-0.15V, V
.
IX
IX
is expected to equal V
IX
(AC) MAX
(AC) MIN
V
DDQ
CK#
CK
/2
SS
.
ID
(DC) (MIN.) when static and centered on V
IL
DDQ
-to-V
/2 of the transmitting device and must track variations in the DC level of the same.
IH
swing of up to 1.5V in the test environment, but input timing is still referenced to V
IL
(AC) and V
IH
(AC).
DDQ
/2.
(10)
REF
V
ID
(or the crossing point for
(DC)
(11)
V
ID
(AC)
11
(12)