AS4C8M16S-7BCNTR Alliance Memory, AS4C8M16S-7BCNTR Datasheet - Page 39
![no-image](/images/no-image-200.jpg)
AS4C8M16S-7BCNTR
Manufacturer Part Number
AS4C8M16S-7BCNTR
Description
DRAM 128Mb, 3.3V, 143Mhz 8M x 16 SDRAM
Manufacturer
Alliance Memory
Datasheet
1.AS4C8M16S-7BCN.pdf
(53 pages)
Specifications of AS4C8M16S-7BCNTR
Rohs
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Figure 32.2. Interleaved Column Read Cycle
CKE
CS#
CAS#
WE#
A0-A9,
A11
DQM
DQ
CLK
RAS#
BA0,1
A10
FEBRUARY 2011
Hi-Z
T0
Activate
Cammand
Bank A
RAx
RAx
T1
t
RCD
T2 T3
Read
Command
Bank A
CAx
T4
Activate
Command
Bank B
RBx
RBx
T5
T6
t
AC
Ax0
T7
Read
Command Command Command
Bank B
Ax1
CBx
T8
Ax2
T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
Read
Bank B
CBy
Ax3
39
Bx0
(Burst Length=4, CAS# Latency=3)
Read
Bank B
CBz
Bx1
By0
Read
Command Command
Bank A
CAy
By1 Bz0
Precharge
Bank B
Bz1 Ay0
Precharge
Command
Bank A
Ay1 Ay2
Don’t Care
Ay3
AS4C8M16S
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