LC4512C-75FTN256I Lattice, LC4512C-75FTN256I Datasheet - Page 38
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LC4512C-75FTN256I
Manufacturer Part Number
LC4512C-75FTN256I
Description
CPLD - Complex Programmable Logic Devices ispJTAG 1.8V 7.5ns 512MC 208 I/O IND
Manufacturer
Lattice
Datasheet
1.LC4256B-75FTN256BI.pdf
(99 pages)
Specifications of LC4512C-75FTN256I
Rohs
yes
Memory Type
EEPROM
Number Of Macrocells
512
Maximum Operating Frequency
178.57 MHz
Delay Time
7.5 ns
Number Of Programmable I/os
208
Operating Supply Voltage
1.8 V
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Package / Case
FTBGA
Mounting Style
SMD/SMT
Number Of Product Terms Per Macro
80
Factory Pack Quantity
450
Supply Current
4 mA
Supply Voltage - Max
1.95 V
Supply Voltage - Min
1.65 V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LC4512C-75FTN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
ispMACH 4000Z Timing Adders (Cont.)
Lattice Semiconductor
Optional Delay Adders
t
t
t
t
t
LVTTL_in
LVCMOS33_in
LVCMOS25_in
LVCMOS18_in
PCI_in
t
LVTTL_out
LVCMOS33_out t
LVCMOS25_out t
LVCMOS18_out t
PCI_out
Slow Slew
Note: Open drain timing is the same as corresponding LVCMOS timing.
1. Refer to TN1004,
INDIO
EXP
ORP
BLA
IOI
IOO
Input Adjusters
Output Adjusters
Adder
Type
t
t
—
t
t
t
t
t
t
t
t
t
ispMACH 4000 Timing Model Design and Usage Guidelines
INREG
MCELL
ROUTE
IN,
IN,
IN,
IN,
IN,
BUF,
BUF,
BUF,
BUF,
BUF,
BUF,
t
t
t
t
t
Parameter
GCLK_IN,
GCLK_IN,
GCLK_IN,
GCLK_IN,
GCLK_IN,
t
t
t
t
t
t
EN,
EN,
EN,
EN,
EN,
EN
Base
t
t
t
t
t
DIS
DIS
DIS
DIS
DIS
t
t
t
t
t
GOE
GOE
GOE
GOE
GOE
Input register delay
Product term expander
delay
Output routing pool
delay
Additional block load-
ing adder
Using LVTTL standard
Using LVCMOS 3.3
standard
Using LVCMOS 2.5
standard
Using LVCMOS 1.8
standard
Using PCI compatible
input
Output configured as
TTL buffer
Output configured as
3.3V buffer
Output configured as
2.5V buffer
Output configured as
1.8V buffer
Output configured as
PCI compatible buffer
Output configured for
slow slew rate
Description
38
1
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ispMACH 4000V/B/C/Z Family Data Sheet
-45
for information regarding use of these adders.
Max.
1.30
0.45
0.40
0.05
0.60
0.60
0.60
0.00
0.60
0.20
0.20
0.10
0.00
0.20
1.00
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-5
Max.
1.30
0.45
0.40
0.05
0.60
0.60
0.60
0.00
0.60
0.20
0.20
0.10
0.00
0.20
1.00
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-75
Max.
1.30
0.50
0.40
0.05
0.60
0.60
0.60
0.00
0.60
0.20
0.20
0.10
0.00
0.20
1.00
Timing v.2.2
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns