MX7575SQ/883B Maxim Integrated, MX7575SQ/883B Datasheet - Page 4
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MX7575SQ/883B
Manufacturer Part Number
MX7575SQ/883B
Description
Analog to Digital Converters - ADC 8-Bit Precision DAC
Manufacturer
Maxim Integrated
Datasheet
1.MX7576KCWNT.pdf
(12 pages)
Specifications of MX7575SQ/883B
Number Of Channels
1
Architecture
SAR
Conversion Rate
200 KSPs
Resolution
8 bit
Input Type
Single-Ended
Snr
45 dB
Interface Type
Parallel
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 125 C
Package / Case
CDIP N
Maximum Power Dissipation
842 mW
Minimum Operating Temperature
- 55 C
Number Of Converters
1
Voltage Reference
External
CMOS, µP-Compatible, 5µs/10µs, 8-Bit ADCs
TIMING CHARACTERISTICS (Note 5)
(V
Note 5: Timing specifications are sample tested at +25°C to ensure compliance. All input control signals are specified with
Note 6: t
Note 7: t
4
______________________________________________________________Pin Description
CS to RD Setup Time
RD to BUSY Propagation Time
Data-Access Time after RD
RD Pulse Width
CS to RD Hold Time
Data-Access Time after BUSY
Data-Hold Time
BUSY to CS Delay
DIP/SO
DD
10–13
7, 8
14
15
16
17
18
—
_______________________________________________________________________________________
1
2
3
4
5
6
9
= +5V, V
PIN
t
3
7
PARAMETER
r
= t
and t
is defined as the time required for the data lines to change 0.5V when loaded with the circuits of Figure 2.
PLCC
12–15
1, 11
f
8, 9
10
16
17
18
19
20
REF
= 20ns (10% to 90% of +5V) and timed from a voltage level of 1.6V.
2
3
4
5
6
7
6
are measured with the load circuits of Figure 1 and defined as the time required for an output to cross 0.8V or 2.4V.
= 1.23V, AGND = DGND = 0V.)
(MX7575)
(MX7576)
D6, D5
D4–D1
NAME
MODE
DGND
AGND
BUSY
N.C.
CLK
REF
V
AIN
RD
CS
D7
D0
TP
DD
Chip Select Input. CS must be low for the device to be selected or to recognize the RD input.
Read Input. RD must be low to access data. RD is also used to start conversions. See the
Microprocessor Interface section.
Test Point. Connect to V
Mode Input. MODE = low puts the ADC into its asynchronous conversion mode. MODE has to be
tied high for the synchronous conversion mode and the ROM interface mode.
BUSY Output. BUSY going low indicates the start of a conversion. BUSY going high indicates the
end of a conversion.
External Clock Input/Internal Oscillator Pin for frequency setting RC components.
Three-State Data Output, bit 7 (MSB)
Three-State Data Outputs, bits 6 and 5
Digital Ground
Three-State Data Outputs, bits 4–1
Three-State Data Output, bit 0 (LSB)
Analog Ground
Analog Input. 0V to 2V
Reference Input. +1.23V nominal.
Power-Supply Voltage. +5V nominal.
No Connect
SYMBOL
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
(Note 6)
(Note 6)
(Note 7)
CONDITIONS
REF
DD
input range.
.
MIN
100
10
T
0
0
0
A
= +25°C
ALL
MAX
100
100
80
80
FUNCTION
MIN
100
10
0
0
0
J/K/A/B
T
A
MAX
100
100
80
80
= T
MIN
to T
MIN
120
10
0
0
0
MAX
S/T
MAX
120
120
100
100
UNITS
ns
ns
ns
ns
ns
ns
ns
ns