S9S12P64J0CFT Freescale Semiconductor, S9S12P64J0CFT Datasheet - Page 416
S9S12P64J0CFT
Manufacturer Part Number
S9S12P64J0CFT
Description
16-bit Microcontrollers - MCU 16-bit 64K Flash
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12P64VQK.pdf
(566 pages)
Specifications of S9S12P64J0CFT
Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
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Serial Peripheral Interface (S12SPIV5)
416
End of Idle State
SCK Edge Number
MSB first (LSBFE = 0):
SCK (CPOL = 0)
SCK (CPOL = 1)
SAMPLE I
MOSI/MISO
CHANGE O
CHANGE O
SEL SS (O)
Master only
SEL SS (I)
t
t
t
t
MOSI pin
MISO pin
LSB first (LSBFE = 1):
L
T
I
L
Figure 12-12. SPI Clock Format 0 (CPHA = 0), with 8-bit Transfer Width selected (XFRW = 0)
, t
= Minimum idling time between transfers (minimum SS high time)
= Minimum leading time before the first SCK edge
= Minimum trailing time after the last SCK edge
T
, and t
I
are guaranteed for the master mode and required for the slave mode.
t
L
MSB
LSB
1
2
Begin
Bit 6
Bit 1
S12P-Family Reference Manual, Rev. 1.13
3
4
Bit 5
Bit 2
5
6
Bit 4
Bit 3
7
Transfer
8
Bit 3
Bit 4
9
10
Bit 2
Bit 5
11
12
Bit 1
Bit 6
13 14
End
MSB
LSB
15
16
Minimum 1/2 SCK
Freescale Semiconductor
t
T
for t
Begin of Idle State
T
t
, t
I
l
, t
L
t
L
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