S912XEG128J2MAL Freescale Semiconductor, S912XEG128J2MAL Datasheet - Page 605

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S912XEG128J2MAL

Manufacturer Part Number
S912XEG128J2MAL
Description
16-bit Microcontrollers - MCU 16BIT 128K FLASH 16K RAM
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEG128J2MAL

Rohs
yes
Core
RISC
Processor Series
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
128 KB
Data Ram Size
12 KB
On-chip Adc
Yes
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT
A/d Bit Size
12 bit
A/d Channels Available
8
Data Rom Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEG128J2MAL
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Chapter 16
Freescale’s Scalable Controller Area Network
(S12MSCANV3)
16.1
Freescale’s scalable controller area network (S12MSCANV3) definition is based on the MSCAN12
definition, which is the specific implementation of the MSCAN concept targeted for the S12, S12X and
S12Z microcontroller families.
The module is a communication controller implementing the CAN 2.0A/B protocol as defined in the
Bosch specification dated September 1991. For users to fully understand the MSCAN specification, it is
recommended that the Bosch specification be read first to familiarize the reader with the terms and
concepts contained within this document.
Though not exclusively intended for automotive applications, CAN protocol is designed to meet the
specific requirements of a vehicle serial data bus: real-time processing, reliable operation in the EMI
environment of a vehicle, cost-effectiveness, and required bandwidth.
MSCAN uses an advanced buffer arrangement resulting in predictable real-time behavior and simplified
application software.
Freescale Semiconductor
Revision
Number
V03.13
V03.14
V03.15
Introduction
Revision Date
12 Nov 2012
03 Mar 2011
12 Jan 2013
16.3.2.15/16-
Figure 16-37
16.1/16-605
Table 16-11
Table 16-26
Figure 16-4
Table 16-3
Table 16-3
Sections
Affected
626
MC9S12XE-Family Reference Manual Rev. 1.25
Table 16-1. Revision History
• Corrected CANE write restrictions
• Removed footnote from RXFRM bit
• Corrected RxWRN and TxWRN threshold values
• Updated TIME bit description
• Added register names to buffer map
• Updated TSRH and TSRL read conditions
• Updated introduction
• Updated CANTXERR and CANRXERR register notes
Description of Changes
605

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