C8051F961-A-GM Silicon Labs, C8051F961-A-GM Datasheet - Page 160
C8051F961-A-GM
Manufacturer Part Number
C8051F961-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, LCD AES, QFN40
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F961-A-GM
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-40
Mounting Style
SMD/SMT
Number Of Programmable I/os
34
Number Of Timers
4
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C8051F96x
12. Cyclic Redundancy Check Unit (CRC0)
C8051F96x devices include a cyclic redundancy check unit (CRC0) that can perform a CRC using a 16-bit
or 32-bit polynomial. CRC0 accepts a stream of 8-bit data written to the CRC0IN register. CRC0 posts the
16-bit or 32-bit result to an internal register. The internal result register may be accessed indirectly using
the CRC0PNT bits and CRC0DAT register, as shown in Figure 12.1. CRC0 also has a bit reverse register
for quick data manipulation.
12.1. 16-bit CRC Algorithm
The C8051F96x CRC unit calculates the 16-bit CRC MSB-first, using a poly of 0x1021. The following
describes the 16-bit CRC algorithm performed by the hardware:
160
1. XOR the most-significant byte of the current CRC result with the input byte. If this is the first iteration
2. Repeat at Step 2a for the number of input bits (8).
of the CRC unit, the current CRC result will be the set initial value (0x0000 or 0xFFFF).
a. If the MSB of the CRC result is set, left-shift the CRC result, and then XOR the CRC result with
b. If the MSB of the CRC result is not set, left-shift the CRC result.
the polynomial (0x1021).
CRC0FLIP
CRC0FLIP
CRC0PNT1
CRC0PNT0
CRC0SEL
CRC0INIT
CRC0VAL
Write
Read
Figure 12.1. CRC0 Block Diagram
CRC0IN
8
CRC Engine
8
8
Rev. 0.5
4 to 1 MUX
RESULT
32
8
8
8
Automatic CRC
8
Controller
CRC0AUTO
CRC0DAT
CRC0CNT
Memory
Flash
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