C8051F961-A-GM Silicon Labs, C8051F961-A-GM Datasheet - Page 245
C8051F961-A-GM
Manufacturer Part Number
C8051F961-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, LCD AES, QFN40
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F961-A-GM
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-40
Mounting Style
SMD/SMT
Number Of Programmable I/os
34
Number Of Timers
4
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Steps 4–7 must be repeated for each 1024-byte page to be erased.
Notes:
18.1.3. Flash Write Procedure
A write to flash memory can clear bits to logic 0 but cannot set them; only an erase operation can set bits
to logic 1 in flash. A byte location to be programmed should be erased before a new value is written.
The recommended procedure for writing a single byte in flash is as follows:
Steps 2–8 must be repeated for each byte to be written.
Notes:
9. Restore previous interrupt state.
1. Flash security settings may prevent erasure of some flash pages, such as the reserved area and the page
2. 8-bit MOVX instructions cannot be used to erase or write to flash memory at addresses higher than 0x00FF.
1. Save current interrupt state and disable interrupts.
2. Set the PSWE bit (register PSCTL).
3. Clear the PSEE bit (register PSCTL).
4. If writing to an address in Banks 1, 2, or 3, set the COBANK[1:0] bits (register PSBANK) for the
5. Ensure that the flash byte has been erased (has a value of 0xFF).
6. Write the first key code to FLKEY: 0xA5.
7. Write the second key code to FLKEY: 0xF1.
8. Using the MOVX instruction, write a single data byte to the desired location within the 1024-byte
9. Clear the PSWE bit.
10. Restore previous interrupt state.
1. Flash security settings may prevent writes to some areas of flash, such as the reserved area. For a summary of
2. 8-bit MOVX instructions cannot be used to erase or write to flash memory at addresses higher than 0x00FF.
appropriate bank.
sector.
containing the lock bytes. For a summary of flash security settings and restrictions affecting flash erase
operations, please see Section “18.3. Security Options” on page 247.
flash security settings and restrictions affecting flash write operations, please see Section “18.3. Security
Options” on page 247.
Rev. 0.5
C8051F96x
245
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