C8051F961-A-GM Silicon Labs, C8051F961-A-GM Datasheet - Page 362
C8051F961-A-GM
Manufacturer Part Number
C8051F961-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, LCD AES, QFN40
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F961-A-GM
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-40
Mounting Style
SMD/SMT
Number Of Programmable I/os
34
Number Of Timers
4
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C8051F96x
SFR Definition 27.6. P1MASK: Port1 Mask Register
SFR Page= 0x0; SFR Address = 0xBF
SFR Definition 27.7. P1MAT: Port1 Match Register
SFR Page = 0x0; SFR Address = 0xCF
362
Note:
Note:
Name
Reset
Name
Reset
Type
Type
Bit
Bit
7:0
Bit
Bit
7:0
P1MAT[7:0] Port 1 Match Value.
P1MASK[7:0] Port 1 Mask Value.
Name
Name
7
0
7
1
Match comparison value used on Port 1 for bits in P1MASK which are set to 1.
0: P1.n pin logic value is compared with logic LOW.
1: P1.n pin logic value is compared with logic HIGH.
Selects P1 pins to be compared to the corresponding bits in P1MAT.
0: P1.n pin logic value is ignored and cannot cause a Port Mismatch event.
1: P1.n pin logic value is compared to P1MAT.n.
6
0
6
1
5
0
5
1
Rev. 0.5
4
P1MASK[7:0]
0
4
1
P1MAT[7:0]
R/W
R/W
Function
Function
3
0
3
1
2
0
2
1
1
0
1
1
0
0
0
1
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