C8051F961-A-GM Silicon Labs, C8051F961-A-GM Datasheet - Page 371
C8051F961-A-GM
Manufacturer Part Number
C8051F961-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, LCD AES, QFN40
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F961-A-GM
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFN-40
Mounting Style
SMD/SMT
Number Of Programmable I/os
34
Number Of Timers
4
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SFR Definition 27.22. P2DRV: Port2 Drive Strength
SFR Page = 0x0F; SFR Address = 0xA6
SFR Definition 27.23. P3: Port3
SFR Page = All Pages; SFR Address = 0xB0; Bit-Addressable
Name
Reset
Name
Reset
Type
Bit
7:0
Type
7:0
Bit
Bit
Bit
P2DRV[7:0]
P3[7:0]
Name
Name
7
0
7
1
Port 3 Data.
Sets the Port latch logic
value or reads the Port pin
logic state in Port cells con-
figured for digital I/O.
Drive Strength Configuration Bits for
Configures digital I/O Port cells to high or low output drive strength.
0: Corresponding P2.n Output has low output drive strength.
1: Corresponding P2.n Output has high output drive strength.
6
0
6
1
Description
5
0
5
1
Rev. 0.5
4
0
4
1
0: Set output latch to logic
LOW.
1: Set output latch to logic
HIGH.
P2DRV[7:0]
P3[7:0]
R/W
R/W
P2.7–P2.0 (respectively).
Function
Read
3
0
3
1
2
0
2
1
0: P3.n Port pin is logic
LOW.
1: P3.n Port pin is logic
HIGH.
C8051F96x
1
0
1
1
Write
0
0
0
1
371
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