C8051F964-A-GQ Silicon Labs, C8051F964-A-GQ Datasheet - Page 228
C8051F964-A-GQ
Manufacturer Part Number
C8051F964-A-GQ
Description
8-bit Microcontrollers - MCU 64KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F964-A-GQ
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F964-A-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F964-A-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F96x
228
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
PC0CMP0H
PC0CMP0M
PC0CMP1H
PC0CMP1M
PC0CTR0M
PC0CMP0L
PC0CMP1L
PC0CTR0H
PC0CTR1H
PC0CTR0L
PC0CTR1L
P3MDOUT
P4MDOUT
P5MDOUT
P6MDOUT
P7MDOUT
PC0HIST
PC0DCH
Register
PC0DCL
P3MDIN
P4MDIN
P5MDIN
P6MDIN
P3DRV
P4DRV
P5DRV
P6DRV
P7DRV
P2
P3
P4
P5
P6
P7
Address
0xDC
0xDC
0xDD
0xD9
0xDA
0xAA
0xFB
0xDB
0xAB
0xFC
0xDA
0xD8
0xDF
0xA0
0xA1
0xF1
0xB1
0xB0
0xA2
0xF2
0xF9
0xA3
0xF3
0xFA
0xF4
0xE3
0xE1
0xE2
0xF3
0xF1
0xF2
0xFA
0xF9
0xF4
Table 16.3. Special Function Registers (Continued)
SFR Page
All Pages Port 2 Latch
All Pages Port 3
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0xF
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
0x2
Port 3 Drive Strength
Port 3 Input Mode Configuration
P3 Mode Out
Port 4 Drive Strength
Port 4 Input Mode Configuration
P4 Mode Out
Port 4 Latch
Port 5 Drive Strength
Port 5 Input Mode Configuration
P5 Mode Out
Port 5 Latch
Port 6 Drive Strength
Port 6 Input Mode Configuration
P6 Mode Out
Port 6 Latch
Port 7 Drive Strength
P7 Mode Out
Port 7 Latch
PC0 Comparator 0 High
PC0 Comparator 0 Low
PC0 Comparator 0 Middle
PC0 Comparator 1 High
PC0 Comparator 1 Low
PC0 Comparator 1 Middle
PC0 Counter 0 High
PC0 Counter 0 Low
PC0 Counter 0 Middle
PC0 Counter 1 High
PC0 Counter 1 Low
PC0 Debounce Configuration High
PC0 Debounce Configuration Low
PC0 History
Rev. 0.5
Description
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