Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 121

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Z8F041APH020SG2156

Manufacturer Part Number
Z8F041APH020SG2156
Description
8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
Manufacturer
ZiLOG
Datasheet

Specifications of Z8F041APH020SG2156

Rohs
yes
Core
eZ8
Processor Series
Z8F041xx
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
4 KB
Data Ram Size
1 KB
On-chip Adc
Yes
Operating Supply Voltage
2.7 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
PDIP-20
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
8
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
PS022827-1212
Receiving Data using the Interrupt-Driven Method
6. Read data from the UART Receive Data Register. If operating in MULTIPROCES-
7. Return to
The UART Receiver interrupt indicates the availability of new data (and error conditions).
Observe the following steps to configure the UART receiver for interrupt-driven opera-
tion:
1. Write to the UART Baud Rate High and Low Byte registers to set the acceptable baud
2. Enable the UART pin functions by configuring the associated GPIO port pins for
3. Execute a DI instruction to disable interrupts.
4. Write to the Interrupt control registers to enable the UART Receiver interrupt and set
5. Clear the UART Receiver interrupt in the applicable Interrupt Request Register.
6. Write to the UART Control 1 Register to enable Multiprocessor (9-bit) mode func-
7. Write the device address to the Address Compare Register (automatic MULTIPRO-
8. Write to the UART Control 0 Register to:
9. Execute an EI instruction to enable interrupts.
SOR (9-bit) Mode, further actions may be required depending on the MULTIPRO-
CESSOR Mode bits MPMD[1:0].
rate.
alternate function operation.
the acceptable priority.
tions, if appropriate.
CESSOR Modes only).
Set the Multiprocessor Mode Select (MPEN) to Enable MULTIPROCESSOR
Mode.
Set the Multiprocessor Mode Bits, MPMD[1:0], to select the acceptable address
matching scheme.
Configure the UART to interrupt on received data and errors or errors only (inter-
rupt on errors only is unlikely to be useful for Z8 Encore! devices without a DMA
block)
Set the receive enable bit (REN) to enable the UART for data reception
Enable parity, if appropriate and if multiprocessor mode is not enabled and select
either even or odd parity
Step 4
to receive additional data.
P R E L I M I N A R Y
Z8 Encore! XP
Product Specification
®
F082A Series
Operation
104

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