Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 146

• Manufacturer Part Number: Z8F041APH020SG2156
• Description: 8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F041APH020SG2156

• Rohs: yes
• Core: eZ8
• Processor Series: Z8F041xx
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 4 KB
• Data Ram Size: 1 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 10 bit
• A/d Channels Available: 8
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

®
Z8 Encore! XP
F082A Series
Product Specification
129
Calibration and Compensation
The Z8 Encore! XP F082A Series ADC is factory calibrated for offset error and gain error,
with the compensation data stored in Flash memory. Alternatively, you can perform your
own calibration, storing the values into Flash themselves. Thirdly, the user code can per-
form a manual offset calibration during DIFFERENTIAL Mode operation.
Factory Calibration
Devices that have been factory calibrated contain 30 bytes of calibration data in the Flash
option bit space. This data consists of 3 bytes for each input mode, one for offset and two
for gain correction. For a list of input modes for which calibration data exists, see the
Zilog Calibration Data
section on page 168.
User Calibration
If you have precision references available, its own external calibration can be performed
using any input modes. This calibration data takes into account buffer offset and nonlin-
earity; therefore Zilog recommends that this calibration be performed separately for each
of the ADC input modes planned for use.
Manual Offset Calibration
When uncalibrated, the ADC has significant offset (see
Table 139
on page 236). Subse-
quently, manual offset calibration capability is built into the block. When the ADC Con-
trol Register 0 sets the input mode (
) to MANUAL OFFSET
ANAIN[2:0]
CALIBRATION Mode, the differential inputs to the ADC are shorted together by an inter-
nal switch. Reading the ADC value at this point produces 0 in an ideal system. The value
actually read is the ADC offset. This value can be stored in nonvolatile memory (see the
Nonvolatile Data Storage
chapter on page 176) and accessed by user code to compensate
for the input offset error. There is no provision for manual gain calibration.
Software Compensation Procedure Using Factory Calibration Data
The value read from the ADC high and low byte registers is uncompensated. The user
mode software must apply gain and offset correction to this uncompensated value for
maximum accuracy. The following equation yields the compensated value:
16








ADC comp
ADC uncomp OFFCAL
ADC uncomp OFFCAL
GAINCAL
2
=
–
+
–
where GAINCAL is the gain calibration value, OFFCAL is the offset calibration value and
ADC
is the uncompensated value read from the ADC. All values are in two’s com-
uncomp
plement format.
PS022827-1212
P R E L I M I N A R Y
Operation