Z8F041APH020SG2156 ZiLOG, Z8F041APH020SG2156 Datasheet - Page 41

• Manufacturer Part Number: Z8F041APH020SG2156
• Description: 8-bit Microcontrollers - MCU 4K FLASH 1K RAM 128B NVDS
• Manufacturer: ZiLOG

Specifications of Z8F041APH020SG2156

• Rohs: yes
• Core: eZ8
• Processor Series: Z8F041xx
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 20 MHz
• Program Memory Size: 4 KB
• Data Ram Size: 1 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: PDIP-20
• Mounting Style: Through Hole
• A/d Bit Size: 10 bit
• A/d Channels Available: 8
• Interface Type: UART
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 17
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V

PS022827-1212
Operating Mode
NORMAL or HALT
modes
STOP Mode
Reset Sources
Power-On Reset
Table 9 lists the possible sources of a system reset.
Z8 Encore! XP F082A Series devices contain an internal Power-On Reset circuit. The
POR circuit monitors the supply voltage and holds the device in the Reset state until the
supply voltage reaches a safe operating level. After the supply voltage exceeds the POR
voltage threshold (V
timed out. If the crystal oscillator is enabled by the option bits, this time-out is longer.
After the Z8 Encore! XP F082A Series device exits the Power-On Reset state, the eZ8
CPU fetches the Reset vector. Following Power-On Reset, the POR status bit in the Reset
Status (RSTSTAT) Register is set to 1.
Figure 5 displays Power-On Reset operation. See
for the POR threshold voltage (V
Reset Source
Power-On Reset/Voltage Brown-
Out
Watchdog Timer time-out
when configured for Reset
RESET pin assertion
On-Chip Debugger initiated Reset
(OCDCTL[0] set to 1)
Power-On Reset/Voltage Brown-
Out
RESET pin assertion
DBG pin driven Low
Table 9. Reset Sources and Resulting Reset Type
POR
), the device is held in the Reset state until the POR Counter has
P R E L I M I N A R Y
POR
).
Special Conditions
Reset delay begins after supply voltage
exceeds POR level.
None.
All reset pulses less than three system clocks
in width are ignored.
System Reset, except the On-Chip Debugger
is unaffected by the reset.
Reset delay begins after supply voltage
exceeds POR level.
All reset pulses less than the specified analog
delay are ignored. See
page
None.
229.
Electrical Characteristics
Z8 Encore! XP
Product Specification
Table 131
®
F082A Series
Reset Sources
on page 221
on
24