MAX7469UTP-T Maxim Integrated, MAX7469UTP-T Datasheet - Page 12

• Manufacturer Part Number: MAX7469UTP-T
• Description: Video ICs
• Manufacturer: Maxim Integrated

HDTV Continuously Variable
Anti-Aliasing Filters
A write cycle begins with the bus master issuing a
START condition followed by 7 address bits (Figure 5)
and 1 write bit (R/W = 0). After successfully receiving its
address, the MAX7469/MAX7470 (slave) issue an ACK.
The slave recognizes the next byte after a successfully
received address as the command byte (Table 3).
Table 3. Command Byte Definition
12
C7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
_______________________________________________________________________________________
C6
INDIVIDUAL BIT DEFINITIONS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C5
COMMAND BYTE:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
C3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
Command Byte (Write Cycle)
C2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
C1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
C0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Enters power-down mode.
Wake-up; resumes normal operation using the frequency/status previously stored
(unless power has been cycled).
Sets IN1 clamp voltage level to low.
Sets IN1 clamp voltage level to high.
Sets IN2 clamp voltage level to low.
Sets IN2 clamp voltage level to high.
Sets IN3 clamp voltage level to low.
Sets IN3 clamp voltage level to high.
Selects component input, color-burst filter disabled.
Selects composite input, color-burst filter enabled.
Selects internal sync.
Selects external sync.
Selects positive polarity external sync.
Selects negative polarity external sync.
Enables filters.
Disables filters, enters bypass mode.
Resets the control/status register to the default values as described in the Control/
Status Register section. This command does not affect the frequency register.
Requests a control/status register read. The interface expects an Sr condition to
follow with address and read/write set to read so data can be driven onto the bus.
Loads the frequency register with the data byte following the command byte.
Requests a frequency register read. The interface expects an Sr condition to follow
with address and read/write set to read so data can be driven onto the bus.
Use the command byte to configure the MAX7469/
MAX7470. While most of the commands listed in Table
3 modify the functionality of the MAX7469/MAX7470,
some commands prepare the device for further data
transfers (see the Control/Status Register and
Frequency Register sections). If the write cycle is pre-
maturely aborted, the register is not updated, and the
DESCRIPTION