DS26514G Maxim Integrated, DS26514G Datasheet - Page 182
DS26514G
Manufacturer Part Number
DS26514G
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26514G.pdf
(305 pages)
Specifications of DS26514G
Part # Aliases
90-26514-G00
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
* RLS6 is reserved for future use.
** Currently RLS2 does not create an interrupt, therefore this bit is not used in T1 mode.
The Receive Interrupt Information Register indicates which of the DS26514 status registers are generating an
interrupt. When an interrupt occurs, the host can read RIIR to quickly identify which of the receive status registers
is (are) causing the interrupt(s). The Receive Interrupt Information Register bits will clear once the appropriate
interrupt has been serviced and cleared, as long as no additional, unmasked interrupt condition is present in the
associated status register. Status bits that have been masked via the Receive Interrupt Mask (RIMx) registers will
also be masked from the RIIR register.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Receive Remote Alarm Indication Condition Clear (RRAIC)
Bit 6: Receive Alarm Indication Signal Condition Clear (RAISC)
Bit 5: Receive Loss of Signal Condition Clear (RLOSC)
Bit 4: Receive Loss of Frame Condition Clear (RLOFC)
Bit 3 : Receive Remote Alarm Indication Condition Detect (RRAID)
Bit 2: Receive Alarm Indication Signal Condition Detect (RAISD)
Bit 1: Receive Loss of Signal Condition Detect (RLOSD)
Bit 0: Receive Loss of Frame Condition Detect (RLOFD)
19-5856; Rev 4; 5/11
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
0 = Interrupt masked.
1 = Interrupt enabled.
RRAIC
—
7
0
7
0
RIIR
Receive Interrupt Information Register
9Fh + (200h x (n - 1)) : where n = 1 to 4
RIM1
Receive Interrupt Mask Register 1
0A0h + (200h x (n - 1)) : where n = 1 to 4
RAISC
RLS7
6
0
6
0
RLOSC
RLS6*
5
0
5
0
RLOFC
RLS5
4
0
4
0
RRAID
RLS4
3
0
3
0
DS26514 4-Port T1/E1/J1 Transceiver
RAISD
RLS3
2
0
2
0
RLOSD
RLS2**
1
0
1
0
182 of 305
RLOFD
RLS1
0
0
0
0
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