DS26514G Maxim Integrated, DS26514G Datasheet - Page 3

• Manufacturer Part Number: DS26514G
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26514G

• Part # Aliases: 90-26514-G00

10.
11.
12.
19-5856; Rev 4; 5/11
9.10
9.11
9.12
9.13
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
11.1
11.2
11.3
11.4
9.9.8
9.9.9
9.9.10
9.9.11
9.9.12
9.9.13
9.9.14
9.9.15
9.9.16
9.9.17
9.10.1
9.10.2
9.10.3
9.12.1
9.12.2
9.12.3
9.12.4
9.12.5
9.12.6
9.13.1
9.13.2
10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
10.2.1
10.2.2
10.2.3
10.2.4
10.2.5
10.4.1
10.4.2
10.8.1
10.8.2
DEVICE REGISTERS ..................................................................................................... 102
FUNCTIONAL TIMING ................................................................................................... 264
OPERATING PARAMETERS ......................................................................................... 283
HDLC C
P
L
B
R
R
G
F
LIU R
BERT R
E
HDLC-256 R
T1 R
T1 T
E1 R
E1 T
INE
RAMER
OWER
IT
XTENDED
EGISTER
EGISTER
LOBAL
Alarms ............................................................................................................................................ 65
Error Count Registers ..................................................................................................................... 67
DS0 Monitoring Function ................................................................................................................. 69
Transmit Per-Channel Idle Code Generation ................................................................................... 70
Receive Per-Channel Idle Code Insertion ........................................................................................ 70
Per-Channel Loopback ................................................................................................................... 70
E1 G.706 Intermediate CRC-4 Updating (E1 Mode Only) ................................................................ 70
T1 Programmable In-Band Loop Code Generator............................................................................ 71
T1 Programmable In-Band Loop Code Detection ............................................................................ 72
Framer Payload Loopbacks............................................................................................................. 73
HDLC-64 Controller ........................................................................................................................ 74
Transmit HDLC-64 Controller .......................................................................................................... 77
HDLC-256 Controller....................................................................................................................... 78
LIU Operation ................................................................................................................................. 87
Transmitter ..................................................................................................................................... 88
Receiver ......................................................................................................................................... 91
Hitless Protection Switching (HPS) .................................................................................................. 95
Jitter Attenuator .............................................................................................................................. 96
LIU Loopbacks ................................................................................................................................ 97
BERT Repetitive Pattern Set ......................................................................................................... 101
BERT Error Counter ...................................................................................................................... 101
Global Register List ....................................................................................................................... 103
Framer Register List...................................................................................................................... 104
LIU Register List ........................................................................................................................... 111
BERT Register List ....................................................................................................................... 112
HDLC-256 Register List ................................................................................................................ 113
Global Register Bit Map ................................................................................................................ 114
Framer Register Bit Map ............................................................................................................... 115
LIU Register Bit Map ..................................................................................................................... 124
BERT Register Bit Map ................................................................................................................. 125
HDLC-256 Register Bit Map .......................................................................................................... 126
Receive Register Descriptions ...................................................................................................... 142
Transmit Register Descriptions ..................................................................................................... 199
Transmit HDLC-256 Register Definitions ....................................................................................... 257
Receive HDLC-256 Register Definitions ........................................................................................ 260
E
RANSMITTER
RANSMITTER
ECEIVER
I
ECEIVER
RROR
NTERFACE
EGISTER
-S
ONTROLLERS
R
EGISTER
R
UPPLY
EGISTER
L
B
EGISTER
-R
BERT R
ISTINGS
IT
EGISTER
ATE
F
F
M
D
UNCTIONAL
UNCTIONAL
APS
U
EFINITIONS
D
D
T
F
F
NITS
ECOUPLING
EFINITIONS
UNCTIONAL
EST
D
UNCTIONAL
D
EGISTER
...............................................................................................................102
..............................................................................................................114
EFINITIONS
ESCRIPTIONS
............................................................................................................. 74
D
(LIU
F
EFINITIONS
UNCTION
T
T
S
....................................................................................................236
IMING
IMING
) ................................................................................................. 85
D
................................................................................................. 84
................................................................................................246
EFINITIONS
T
T
.............................................................................................127
IMING
IMING
(BERT) ..............................................................................100
D
D
.........................................................................................142
.........................................................................................257
IAGRAMS
IAGRAMS
D
D
IAGRAMS
IAGRAMS
...............................................................................253
.........................................................................264
.........................................................................274
....................................................................269
...................................................................278
DS26514 4-Port T1/E1/J1 Transceiver
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